usb: musb: drop useless board_mode usage
we are compiling the driver always with full OTG capabilities, so that board_mode trick becomes useless. Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
@@ -107,9 +107,8 @@ static void am35x_musb_enable(struct musb *musb)
|
|||||||
musb_writel(reg_base, CORE_INTR_MASK_SET_REG, AM35X_INTR_USB_MASK);
|
musb_writel(reg_base, CORE_INTR_MASK_SET_REG, AM35X_INTR_USB_MASK);
|
||||||
|
|
||||||
/* Force the DRVVBUS IRQ so we can start polling for ID change. */
|
/* Force the DRVVBUS IRQ so we can start polling for ID change. */
|
||||||
if (is_otg_enabled(musb))
|
musb_writel(reg_base, CORE_INTR_SRC_SET_REG,
|
||||||
musb_writel(reg_base, CORE_INTR_SRC_SET_REG,
|
AM35X_INTR_DRVVBUS << AM35X_INTR_USB_SHIFT);
|
||||||
AM35X_INTR_DRVVBUS << AM35X_INTR_USB_SHIFT);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -173,9 +172,6 @@ static void otg_timer(unsigned long _musb)
|
|||||||
MUSB_INTR_VBUSERROR << AM35X_INTR_USB_SHIFT);
|
MUSB_INTR_VBUSERROR << AM35X_INTR_USB_SHIFT);
|
||||||
break;
|
break;
|
||||||
case OTG_STATE_B_IDLE:
|
case OTG_STATE_B_IDLE:
|
||||||
if (!is_peripheral_enabled(musb))
|
|
||||||
break;
|
|
||||||
|
|
||||||
devctl = musb_readb(mregs, MUSB_DEVCTL);
|
devctl = musb_readb(mregs, MUSB_DEVCTL);
|
||||||
if (devctl & MUSB_DEVCTL_BDEVICE)
|
if (devctl & MUSB_DEVCTL_BDEVICE)
|
||||||
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
||||||
@@ -192,9 +188,6 @@ static void am35x_musb_try_idle(struct musb *musb, unsigned long timeout)
|
|||||||
{
|
{
|
||||||
static unsigned long last_timer;
|
static unsigned long last_timer;
|
||||||
|
|
||||||
if (!is_otg_enabled(musb))
|
|
||||||
return;
|
|
||||||
|
|
||||||
if (timeout == 0)
|
if (timeout == 0)
|
||||||
timeout = jiffies + msecs_to_jiffies(3);
|
timeout = jiffies + msecs_to_jiffies(3);
|
||||||
|
|
||||||
@@ -271,8 +264,7 @@ static irqreturn_t am35x_musb_interrupt(int irq, void *hci)
|
|||||||
u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
|
u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
err = is_host_enabled(musb) && (musb->int_usb &
|
err = musb->int_usb & MUSB_INTR_VBUSERROR;
|
||||||
MUSB_INTR_VBUSERROR);
|
|
||||||
if (err) {
|
if (err) {
|
||||||
/*
|
/*
|
||||||
* The Mentor core doesn't debounce VBUS as needed
|
* The Mentor core doesn't debounce VBUS as needed
|
||||||
@@ -289,7 +281,7 @@ static irqreturn_t am35x_musb_interrupt(int irq, void *hci)
|
|||||||
musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
|
musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
|
||||||
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
||||||
WARNING("VBUS error workaround (delay coming)\n");
|
WARNING("VBUS error workaround (delay coming)\n");
|
||||||
} else if (is_host_enabled(musb) && drvvbus) {
|
} else if (drvvbus) {
|
||||||
MUSB_HST_MODE(musb);
|
MUSB_HST_MODE(musb);
|
||||||
otg->default_a = 1;
|
otg->default_a = 1;
|
||||||
musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
|
musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
|
||||||
@@ -326,7 +318,7 @@ eoi:
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Poll for ID change */
|
/* Poll for ID change */
|
||||||
if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
|
if (musb->xceiv->state == OTG_STATE_B_IDLE)
|
||||||
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&musb->lock, flags);
|
spin_unlock_irqrestore(&musb->lock, flags);
|
||||||
@@ -369,8 +361,7 @@ static int am35x_musb_init(struct musb *musb)
|
|||||||
if (IS_ERR_OR_NULL(musb->xceiv))
|
if (IS_ERR_OR_NULL(musb->xceiv))
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
||||||
if (is_host_enabled(musb))
|
setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
|
||||||
setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
|
|
||||||
|
|
||||||
/* Reset the musb */
|
/* Reset the musb */
|
||||||
if (data->reset)
|
if (data->reset)
|
||||||
@@ -400,8 +391,7 @@ static int am35x_musb_exit(struct musb *musb)
|
|||||||
struct musb_hdrc_platform_data *plat = dev->platform_data;
|
struct musb_hdrc_platform_data *plat = dev->platform_data;
|
||||||
struct omap_musb_board_data *data = plat->board_data;
|
struct omap_musb_board_data *data = plat->board_data;
|
||||||
|
|
||||||
if (is_host_enabled(musb))
|
del_timer_sync(&otg_workaround);
|
||||||
del_timer_sync(&otg_workaround);
|
|
||||||
|
|
||||||
/* Shutdown the on-chip PHY and its PLL. */
|
/* Shutdown the on-chip PHY and its PLL. */
|
||||||
if (data->set_phy_power)
|
if (data->set_phy_power)
|
||||||
|
@@ -184,8 +184,8 @@ static irqreturn_t blackfin_interrupt(int irq, void *__hci)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Start sampling ID pin, when plug is removed from MUSB */
|
/* Start sampling ID pin, when plug is removed from MUSB */
|
||||||
if ((is_otg_enabled(musb) && (musb->xceiv->state == OTG_STATE_B_IDLE
|
if ((musb->xceiv->state == OTG_STATE_B_IDLE
|
||||||
|| musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) ||
|
|| musb->xceiv->state == OTG_STATE_A_WAIT_BCON) ||
|
||||||
(musb->int_usb & MUSB_INTR_DISCONNECT && is_host_active(musb))) {
|
(musb->int_usb & MUSB_INTR_DISCONNECT && is_host_active(musb))) {
|
||||||
mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY);
|
mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY);
|
||||||
musb->a_wait_bcon = TIMER_DELAY;
|
musb->a_wait_bcon = TIMER_DELAY;
|
||||||
@@ -228,18 +228,13 @@ static void musb_conn_timer_handler(unsigned long _musb)
|
|||||||
|
|
||||||
val = MUSB_INTR_SUSPEND | MUSB_INTR_VBUSERROR;
|
val = MUSB_INTR_SUSPEND | MUSB_INTR_VBUSERROR;
|
||||||
musb_writeb(musb->mregs, MUSB_INTRUSB, val);
|
musb_writeb(musb->mregs, MUSB_INTRUSB, val);
|
||||||
if (is_otg_enabled(musb))
|
musb->xceiv->state = OTG_STATE_B_IDLE;
|
||||||
musb->xceiv->state = OTG_STATE_B_IDLE;
|
|
||||||
else
|
|
||||||
musb_writeb(musb->mregs, MUSB_POWER, MUSB_POWER_HSENAB);
|
|
||||||
}
|
}
|
||||||
mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY);
|
mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY);
|
||||||
break;
|
break;
|
||||||
case OTG_STATE_B_IDLE:
|
case OTG_STATE_B_IDLE:
|
||||||
|
/*
|
||||||
if (!is_peripheral_enabled(musb))
|
* Start a new session. It seems that MUSB needs taking
|
||||||
break;
|
|
||||||
/* Start a new session. It seems that MUSB needs taking
|
|
||||||
* some time to recognize the type of the plug inserted?
|
* some time to recognize the type of the plug inserted?
|
||||||
*/
|
*/
|
||||||
val = musb_readw(musb->mregs, MUSB_DEVCTL);
|
val = musb_readw(musb->mregs, MUSB_DEVCTL);
|
||||||
@@ -295,10 +290,7 @@ static void musb_conn_timer_handler(unsigned long _musb)
|
|||||||
|
|
||||||
static void bfin_musb_enable(struct musb *musb)
|
static void bfin_musb_enable(struct musb *musb)
|
||||||
{
|
{
|
||||||
if (!is_otg_enabled(musb) && is_host_enabled(musb)) {
|
/* REVISIT is this really correct ? */
|
||||||
mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY);
|
|
||||||
musb->a_wait_bcon = TIMER_DELAY;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static void bfin_musb_disable(struct musb *musb)
|
static void bfin_musb_disable(struct musb *musb)
|
||||||
@@ -323,12 +315,6 @@ static int bfin_musb_set_power(struct usb_phy *x, unsigned mA)
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void bfin_musb_try_idle(struct musb *musb, unsigned long timeout)
|
|
||||||
{
|
|
||||||
if (!is_otg_enabled(musb) && is_host_enabled(musb))
|
|
||||||
mod_timer(&musb_conn_timer, jiffies + TIMER_DELAY);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int bfin_musb_vbus_status(struct musb *musb)
|
static int bfin_musb_vbus_status(struct musb *musb)
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
@@ -424,12 +410,10 @@ static int bfin_musb_init(struct musb *musb)
|
|||||||
|
|
||||||
bfin_musb_reg_init(musb);
|
bfin_musb_reg_init(musb);
|
||||||
|
|
||||||
if (is_host_enabled(musb)) {
|
setup_timer(&musb_conn_timer, musb_conn_timer_handler,
|
||||||
setup_timer(&musb_conn_timer,
|
(unsigned long) musb);
|
||||||
musb_conn_timer_handler, (unsigned long) musb);
|
|
||||||
}
|
musb->xceiv->set_power = bfin_musb_set_power;
|
||||||
if (is_peripheral_enabled(musb))
|
|
||||||
musb->xceiv->set_power = bfin_musb_set_power;
|
|
||||||
|
|
||||||
musb->isr = blackfin_interrupt;
|
musb->isr = blackfin_interrupt;
|
||||||
musb->double_buffer_not_ok = true;
|
musb->double_buffer_not_ok = true;
|
||||||
@@ -454,7 +438,6 @@ static const struct musb_platform_ops bfin_ops = {
|
|||||||
.disable = bfin_musb_disable,
|
.disable = bfin_musb_disable,
|
||||||
|
|
||||||
.set_mode = bfin_musb_set_mode,
|
.set_mode = bfin_musb_set_mode,
|
||||||
.try_idle = bfin_musb_try_idle,
|
|
||||||
|
|
||||||
.vbus_status = bfin_musb_vbus_status,
|
.vbus_status = bfin_musb_vbus_status,
|
||||||
.set_vbus = bfin_musb_set_vbus,
|
.set_vbus = bfin_musb_set_vbus,
|
||||||
|
@@ -155,9 +155,8 @@ static void da8xx_musb_enable(struct musb *musb)
|
|||||||
musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask);
|
musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask);
|
||||||
|
|
||||||
/* Force the DRVVBUS IRQ so we can start polling for ID change. */
|
/* Force the DRVVBUS IRQ so we can start polling for ID change. */
|
||||||
if (is_otg_enabled(musb))
|
musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG,
|
||||||
musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG,
|
DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT);
|
||||||
DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -231,9 +230,6 @@ static void otg_timer(unsigned long _musb)
|
|||||||
MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT);
|
MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT);
|
||||||
break;
|
break;
|
||||||
case OTG_STATE_B_IDLE:
|
case OTG_STATE_B_IDLE:
|
||||||
if (!is_peripheral_enabled(musb))
|
|
||||||
break;
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* There's no ID-changed IRQ, so we have no good way to tell
|
* There's no ID-changed IRQ, so we have no good way to tell
|
||||||
* when to switch to the A-Default state machine (by setting
|
* when to switch to the A-Default state machine (by setting
|
||||||
@@ -263,9 +259,6 @@ static void da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
|
|||||||
{
|
{
|
||||||
static unsigned long last_timer;
|
static unsigned long last_timer;
|
||||||
|
|
||||||
if (!is_otg_enabled(musb))
|
|
||||||
return;
|
|
||||||
|
|
||||||
if (timeout == 0)
|
if (timeout == 0)
|
||||||
timeout = jiffies + msecs_to_jiffies(3);
|
timeout = jiffies + msecs_to_jiffies(3);
|
||||||
|
|
||||||
@@ -333,8 +326,7 @@ static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
|
|||||||
u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
|
u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
err = is_host_enabled(musb) && (musb->int_usb &
|
err = musb->int_usb & USB_INTR_VBUSERROR;
|
||||||
MUSB_INTR_VBUSERROR);
|
|
||||||
if (err) {
|
if (err) {
|
||||||
/*
|
/*
|
||||||
* The Mentor core doesn't debounce VBUS as needed
|
* The Mentor core doesn't debounce VBUS as needed
|
||||||
@@ -351,7 +343,7 @@ static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
|
|||||||
musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
|
musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
|
||||||
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
||||||
WARNING("VBUS error workaround (delay coming)\n");
|
WARNING("VBUS error workaround (delay coming)\n");
|
||||||
} else if (is_host_enabled(musb) && drvvbus) {
|
} else if (drvvbus) {
|
||||||
MUSB_HST_MODE(musb);
|
MUSB_HST_MODE(musb);
|
||||||
otg->default_a = 1;
|
otg->default_a = 1;
|
||||||
musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
|
musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
|
||||||
@@ -382,7 +374,7 @@ static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
|
|||||||
musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
|
musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
|
||||||
|
|
||||||
/* Poll for ID change */
|
/* Poll for ID change */
|
||||||
if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
|
if (musb->xceiv->state == OTG_STATE_B_IDLE)
|
||||||
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&musb->lock, flags);
|
spin_unlock_irqrestore(&musb->lock, flags);
|
||||||
@@ -430,8 +422,7 @@ static int da8xx_musb_init(struct musb *musb)
|
|||||||
if (IS_ERR_OR_NULL(musb->xceiv))
|
if (IS_ERR_OR_NULL(musb->xceiv))
|
||||||
goto fail;
|
goto fail;
|
||||||
|
|
||||||
if (is_host_enabled(musb))
|
setup_timer(&otg_workaround, otg_timer, (unsigned long)musb);
|
||||||
setup_timer(&otg_workaround, otg_timer, (unsigned long)musb);
|
|
||||||
|
|
||||||
/* Reset the controller */
|
/* Reset the controller */
|
||||||
musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
|
musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
|
||||||
@@ -454,8 +445,7 @@ fail:
|
|||||||
|
|
||||||
static int da8xx_musb_exit(struct musb *musb)
|
static int da8xx_musb_exit(struct musb *musb)
|
||||||
{
|
{
|
||||||
if (is_host_enabled(musb))
|
del_timer_sync(&otg_workaround);
|
||||||
del_timer_sync(&otg_workaround);
|
|
||||||
|
|
||||||
phy_off();
|
phy_off();
|
||||||
|
|
||||||
|
@@ -115,8 +115,7 @@ static void davinci_musb_enable(struct musb *musb)
|
|||||||
dma_off = 0;
|
dma_off = 0;
|
||||||
|
|
||||||
/* force a DRVVBUS irq so we can start polling for ID change */
|
/* force a DRVVBUS irq so we can start polling for ID change */
|
||||||
if (is_otg_enabled(musb))
|
musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
|
||||||
musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG,
|
|
||||||
DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT);
|
DAVINCI_INTR_DRVVBUS << DAVINCI_USB_USBINT_SHIFT);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -234,10 +233,8 @@ static void otg_timer(unsigned long _musb)
|
|||||||
MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
|
MUSB_INTR_VBUSERROR << DAVINCI_USB_USBINT_SHIFT);
|
||||||
break;
|
break;
|
||||||
case OTG_STATE_B_IDLE:
|
case OTG_STATE_B_IDLE:
|
||||||
if (!is_peripheral_enabled(musb))
|
/*
|
||||||
break;
|
* There's no ID-changed IRQ, so we have no good way to tell
|
||||||
|
|
||||||
/* There's no ID-changed IRQ, so we have no good way to tell
|
|
||||||
* when to switch to the A-Default state machine (by setting
|
* when to switch to the A-Default state machine (by setting
|
||||||
* the DEVCTL.SESSION flag).
|
* the DEVCTL.SESSION flag).
|
||||||
*
|
*
|
||||||
@@ -315,8 +312,7 @@ static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
|
|||||||
u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
|
u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
|
||||||
int err = musb->int_usb & MUSB_INTR_VBUSERROR;
|
int err = musb->int_usb & MUSB_INTR_VBUSERROR;
|
||||||
|
|
||||||
err = is_host_enabled(musb)
|
err = musb->int_usb & MUSB_INTR_VBUSERROR;
|
||||||
&& (musb->int_usb & MUSB_INTR_VBUSERROR);
|
|
||||||
if (err) {
|
if (err) {
|
||||||
/* The Mentor core doesn't debounce VBUS as needed
|
/* The Mentor core doesn't debounce VBUS as needed
|
||||||
* to cope with device connect current spikes. This
|
* to cope with device connect current spikes. This
|
||||||
@@ -332,7 +328,7 @@ static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
|
|||||||
musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
|
musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
|
||||||
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
||||||
WARNING("VBUS error workaround (delay coming)\n");
|
WARNING("VBUS error workaround (delay coming)\n");
|
||||||
} else if (is_host_enabled(musb) && drvvbus) {
|
} else if (drvvbus) {
|
||||||
MUSB_HST_MODE(musb);
|
MUSB_HST_MODE(musb);
|
||||||
otg->default_a = 1;
|
otg->default_a = 1;
|
||||||
musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
|
musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
|
||||||
@@ -365,8 +361,7 @@ static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
|
|||||||
musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);
|
musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);
|
||||||
|
|
||||||
/* poll for ID change */
|
/* poll for ID change */
|
||||||
if (is_otg_enabled(musb)
|
if (musb->xceiv->state == OTG_STATE_B_IDLE)
|
||||||
&& musb->xceiv->state == OTG_STATE_B_IDLE)
|
|
||||||
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
mod_timer(&otg_workaround, jiffies + POLL_SECONDS * HZ);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&musb->lock, flags);
|
spin_unlock_irqrestore(&musb->lock, flags);
|
||||||
@@ -397,8 +392,7 @@ static int davinci_musb_init(struct musb *musb)
|
|||||||
if (revision == 0)
|
if (revision == 0)
|
||||||
goto fail;
|
goto fail;
|
||||||
|
|
||||||
if (is_host_enabled(musb))
|
setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
|
||||||
setup_timer(&otg_workaround, otg_timer, (unsigned long) musb);
|
|
||||||
|
|
||||||
davinci_musb_source_power(musb, 0, 1);
|
davinci_musb_source_power(musb, 0, 1);
|
||||||
|
|
||||||
@@ -419,12 +413,7 @@ static int davinci_musb_init(struct musb *musb)
|
|||||||
if (cpu_is_davinci_dm355()) {
|
if (cpu_is_davinci_dm355()) {
|
||||||
u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
|
u32 deepsleep = __raw_readl(DM355_DEEPSLEEP);
|
||||||
|
|
||||||
if (is_host_enabled(musb)) {
|
deepsleep &= ~DRVVBUS_FORCE;
|
||||||
deepsleep &= ~DRVVBUS_OVERRIDE;
|
|
||||||
} else {
|
|
||||||
deepsleep &= ~DRVVBUS_FORCE;
|
|
||||||
deepsleep |= DRVVBUS_OVERRIDE;
|
|
||||||
}
|
|
||||||
__raw_writel(deepsleep, DM355_DEEPSLEEP);
|
__raw_writel(deepsleep, DM355_DEEPSLEEP);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -453,8 +442,7 @@ unregister:
|
|||||||
|
|
||||||
static int davinci_musb_exit(struct musb *musb)
|
static int davinci_musb_exit(struct musb *musb)
|
||||||
{
|
{
|
||||||
if (is_host_enabled(musb))
|
del_timer_sync(&otg_workaround);
|
||||||
del_timer_sync(&otg_workaround);
|
|
||||||
|
|
||||||
/* force VBUS off */
|
/* force VBUS off */
|
||||||
if (cpu_is_davinci_dm355()) {
|
if (cpu_is_davinci_dm355()) {
|
||||||
@@ -468,7 +456,7 @@ static int davinci_musb_exit(struct musb *musb)
|
|||||||
davinci_musb_source_power(musb, 0 /*off*/, 1);
|
davinci_musb_source_power(musb, 0 /*off*/, 1);
|
||||||
|
|
||||||
/* delay, to avoid problems with module reload */
|
/* delay, to avoid problems with module reload */
|
||||||
if (is_host_enabled(musb) && musb->xceiv->otg->default_a) {
|
if (musb->xceiv->otg->default_a) {
|
||||||
int maxdelay = 30;
|
int maxdelay = 30;
|
||||||
u8 devctl, warn = 0;
|
u8 devctl, warn = 0;
|
||||||
|
|
||||||
|
@@ -649,8 +649,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
|
|||||||
break;
|
break;
|
||||||
case OTG_STATE_B_PERIPHERAL:
|
case OTG_STATE_B_PERIPHERAL:
|
||||||
musb_g_suspend(musb);
|
musb_g_suspend(musb);
|
||||||
musb->is_active = is_otg_enabled(musb)
|
musb->is_active = otg->gadget->b_hnp_enable;
|
||||||
&& otg->gadget->b_hnp_enable;
|
|
||||||
if (musb->is_active) {
|
if (musb->is_active) {
|
||||||
musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
|
musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
|
||||||
dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n");
|
dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n");
|
||||||
@@ -666,8 +665,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
|
|||||||
break;
|
break;
|
||||||
case OTG_STATE_A_HOST:
|
case OTG_STATE_A_HOST:
|
||||||
musb->xceiv->state = OTG_STATE_A_SUSPEND;
|
musb->xceiv->state = OTG_STATE_A_SUSPEND;
|
||||||
musb->is_active = is_otg_enabled(musb)
|
musb->is_active = otg->host->b_hnp_enable;
|
||||||
&& otg->host->b_hnp_enable;
|
|
||||||
break;
|
break;
|
||||||
case OTG_STATE_B_HOST:
|
case OTG_STATE_B_HOST:
|
||||||
/* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */
|
/* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */
|
||||||
@@ -755,7 +753,7 @@ b_host:
|
|||||||
case OTG_STATE_A_SUSPEND:
|
case OTG_STATE_A_SUSPEND:
|
||||||
usb_hcd_resume_root_hub(musb_to_hcd(musb));
|
usb_hcd_resume_root_hub(musb_to_hcd(musb));
|
||||||
musb_root_disconnect(musb);
|
musb_root_disconnect(musb);
|
||||||
if (musb->a_wait_bcon != 0 && is_otg_enabled(musb))
|
if (musb->a_wait_bcon != 0)
|
||||||
musb_platform_try_idle(musb, jiffies
|
musb_platform_try_idle(musb, jiffies
|
||||||
+ msecs_to_jiffies(musb->a_wait_bcon));
|
+ msecs_to_jiffies(musb->a_wait_bcon));
|
||||||
break;
|
break;
|
||||||
@@ -931,25 +929,16 @@ void musb_start(struct musb *musb)
|
|||||||
devctl = musb_readb(regs, MUSB_DEVCTL);
|
devctl = musb_readb(regs, MUSB_DEVCTL);
|
||||||
devctl &= ~MUSB_DEVCTL_SESSION;
|
devctl &= ~MUSB_DEVCTL_SESSION;
|
||||||
|
|
||||||
if (is_otg_enabled(musb)) {
|
/* session started after:
|
||||||
/* session started after:
|
* (a) ID-grounded irq, host mode;
|
||||||
* (a) ID-grounded irq, host mode;
|
* (b) vbus present/connect IRQ, peripheral mode;
|
||||||
* (b) vbus present/connect IRQ, peripheral mode;
|
* (c) peripheral initiates, using SRP
|
||||||
* (c) peripheral initiates, using SRP
|
*/
|
||||||
*/
|
if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
|
||||||
if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
|
musb->is_active = 1;
|
||||||
musb->is_active = 1;
|
else
|
||||||
else
|
|
||||||
devctl |= MUSB_DEVCTL_SESSION;
|
|
||||||
|
|
||||||
} else if (is_host_enabled(musb)) {
|
|
||||||
/* assume ID pin is hard-wired to ground */
|
|
||||||
devctl |= MUSB_DEVCTL_SESSION;
|
devctl |= MUSB_DEVCTL_SESSION;
|
||||||
|
|
||||||
} else /* peripheral is enabled */ {
|
|
||||||
if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS)
|
|
||||||
musb->is_active = 1;
|
|
||||||
}
|
|
||||||
musb_platform_enable(musb);
|
musb_platform_enable(musb);
|
||||||
musb_writeb(regs, MUSB_DEVCTL, devctl);
|
musb_writeb(regs, MUSB_DEVCTL, devctl);
|
||||||
}
|
}
|
||||||
@@ -1013,8 +1002,6 @@ static void musb_shutdown(struct platform_device *pdev)
|
|||||||
musb_generic_disable(musb);
|
musb_generic_disable(musb);
|
||||||
spin_unlock_irqrestore(&musb->lock, flags);
|
spin_unlock_irqrestore(&musb->lock, flags);
|
||||||
|
|
||||||
if (!is_otg_enabled(musb) && is_host_enabled(musb))
|
|
||||||
usb_remove_hcd(musb_to_hcd(musb));
|
|
||||||
musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
|
musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
|
||||||
musb_platform_exit(musb);
|
musb_platform_exit(musb);
|
||||||
|
|
||||||
@@ -1885,6 +1872,7 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
|
|||||||
int status;
|
int status;
|
||||||
struct musb *musb;
|
struct musb *musb;
|
||||||
struct musb_hdrc_platform_data *plat = dev->platform_data;
|
struct musb_hdrc_platform_data *plat = dev->platform_data;
|
||||||
|
struct usb_hcd *hcd;
|
||||||
|
|
||||||
/* The driver might handle more features than the board; OK.
|
/* The driver might handle more features than the board; OK.
|
||||||
* Fail when the board needs a feature that's not enabled.
|
* Fail when the board needs a feature that's not enabled.
|
||||||
@@ -1907,7 +1895,6 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
|
|||||||
pm_runtime_enable(musb->controller);
|
pm_runtime_enable(musb->controller);
|
||||||
|
|
||||||
spin_lock_init(&musb->lock);
|
spin_lock_init(&musb->lock);
|
||||||
musb->board_mode = plat->mode;
|
|
||||||
musb->board_set_power = plat->set_power;
|
musb->board_set_power = plat->set_power;
|
||||||
musb->min_power = plat->min_power;
|
musb->min_power = plat->min_power;
|
||||||
musb->ops = plat->platform_ops;
|
musb->ops = plat->platform_ops;
|
||||||
@@ -1978,7 +1965,7 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
|
|||||||
goto fail3;
|
goto fail3;
|
||||||
}
|
}
|
||||||
musb->nIrq = nIrq;
|
musb->nIrq = nIrq;
|
||||||
/* FIXME this handles wakeup irqs wrong */
|
/* FIXME this handles wakeup irqs wrong */
|
||||||
if (enable_irq_wake(nIrq) == 0) {
|
if (enable_irq_wake(nIrq) == 0) {
|
||||||
musb->irq_wake = 1;
|
musb->irq_wake = 1;
|
||||||
device_init_wakeup(dev, 1);
|
device_init_wakeup(dev, 1);
|
||||||
@@ -1987,58 +1974,25 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* host side needs more setup */
|
/* host side needs more setup */
|
||||||
if (is_host_enabled(musb)) {
|
hcd = musb_to_hcd(musb);
|
||||||
struct usb_hcd *hcd = musb_to_hcd(musb);
|
otg_set_host(musb->xceiv->otg, &hcd->self);
|
||||||
|
hcd->self.otg_port = 1;
|
||||||
|
musb->xceiv->otg->host = &hcd->self;
|
||||||
|
hcd->power_budget = 2 * (plat->power ? : 250);
|
||||||
|
|
||||||
otg_set_host(musb->xceiv->otg, &hcd->self);
|
/* program PHY to use external vBus if required */
|
||||||
|
if (plat->extvbus) {
|
||||||
if (is_otg_enabled(musb))
|
u8 busctl = musb_read_ulpi_buscontrol(musb->mregs);
|
||||||
hcd->self.otg_port = 1;
|
busctl |= MUSB_ULPI_USE_EXTVBUS;
|
||||||
musb->xceiv->otg->host = &hcd->self;
|
musb_write_ulpi_buscontrol(musb->mregs, busctl);
|
||||||
hcd->power_budget = 2 * (plat->power ? : 250);
|
|
||||||
|
|
||||||
/* program PHY to use external vBus if required */
|
|
||||||
if (plat->extvbus) {
|
|
||||||
u8 busctl = musb_read_ulpi_buscontrol(musb->mregs);
|
|
||||||
busctl |= MUSB_ULPI_USE_EXTVBUS;
|
|
||||||
musb_write_ulpi_buscontrol(musb->mregs, busctl);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* For the host-only role, we can activate right away.
|
MUSB_DEV_MODE(musb);
|
||||||
* (We expect the ID pin to be forcibly grounded!!)
|
musb->xceiv->otg->default_a = 0;
|
||||||
* Otherwise, wait till the gadget driver hooks up.
|
musb->xceiv->state = OTG_STATE_B_IDLE;
|
||||||
*/
|
|
||||||
if (!is_otg_enabled(musb) && is_host_enabled(musb)) {
|
|
||||||
struct usb_hcd *hcd = musb_to_hcd(musb);
|
|
||||||
|
|
||||||
MUSB_HST_MODE(musb);
|
status = musb_gadget_setup(musb);
|
||||||
musb->xceiv->otg->default_a = 1;
|
|
||||||
musb->xceiv->state = OTG_STATE_A_IDLE;
|
|
||||||
|
|
||||||
status = usb_add_hcd(musb_to_hcd(musb), 0, 0);
|
|
||||||
|
|
||||||
hcd->self.uses_pio_for_control = 1;
|
|
||||||
dev_dbg(musb->controller, "%s mode, status %d, devctl %02x %c\n",
|
|
||||||
"HOST", status,
|
|
||||||
musb_readb(musb->mregs, MUSB_DEVCTL),
|
|
||||||
(musb_readb(musb->mregs, MUSB_DEVCTL)
|
|
||||||
& MUSB_DEVCTL_BDEVICE
|
|
||||||
? 'B' : 'A'));
|
|
||||||
|
|
||||||
} else /* peripheral is enabled */ {
|
|
||||||
MUSB_DEV_MODE(musb);
|
|
||||||
musb->xceiv->otg->default_a = 0;
|
|
||||||
musb->xceiv->state = OTG_STATE_B_IDLE;
|
|
||||||
|
|
||||||
status = musb_gadget_setup(musb);
|
|
||||||
|
|
||||||
dev_dbg(musb->controller, "%s mode, status %d, dev%02x\n",
|
|
||||||
is_otg_enabled(musb) ? "OTG" : "PERIPHERAL",
|
|
||||||
status,
|
|
||||||
musb_readb(musb->mregs, MUSB_DEVCTL));
|
|
||||||
|
|
||||||
}
|
|
||||||
if (status < 0)
|
if (status < 0)
|
||||||
goto fail3;
|
goto fail3;
|
||||||
|
|
||||||
@@ -2054,28 +2008,13 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
|
|||||||
|
|
||||||
pm_runtime_put(musb->controller);
|
pm_runtime_put(musb->controller);
|
||||||
|
|
||||||
dev_info(dev, "USB %s mode controller at %p using %s, IRQ %d\n",
|
|
||||||
({char *s;
|
|
||||||
switch (musb->board_mode) {
|
|
||||||
case MUSB_HOST: s = "Host"; break;
|
|
||||||
case MUSB_PERIPHERAL: s = "Peripheral"; break;
|
|
||||||
default: s = "OTG"; break;
|
|
||||||
}; s; }),
|
|
||||||
ctrl,
|
|
||||||
(is_dma_capable() && musb->dma_controller)
|
|
||||||
? "DMA" : "PIO",
|
|
||||||
musb->nIrq);
|
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
fail5:
|
fail5:
|
||||||
musb_exit_debugfs(musb);
|
musb_exit_debugfs(musb);
|
||||||
|
|
||||||
fail4:
|
fail4:
|
||||||
if (!is_otg_enabled(musb) && is_host_enabled(musb))
|
musb_gadget_cleanup(musb);
|
||||||
usb_remove_hcd(musb_to_hcd(musb));
|
|
||||||
else
|
|
||||||
musb_gadget_cleanup(musb);
|
|
||||||
|
|
||||||
fail3:
|
fail3:
|
||||||
pm_runtime_put_sync(musb->controller);
|
pm_runtime_put_sync(musb->controller);
|
||||||
@@ -2166,11 +2105,9 @@ static void musb_save_context(struct musb *musb)
|
|||||||
void __iomem *musb_base = musb->mregs;
|
void __iomem *musb_base = musb->mregs;
|
||||||
void __iomem *epio;
|
void __iomem *epio;
|
||||||
|
|
||||||
if (is_host_enabled(musb)) {
|
musb->context.frame = musb_readw(musb_base, MUSB_FRAME);
|
||||||
musb->context.frame = musb_readw(musb_base, MUSB_FRAME);
|
musb->context.testmode = musb_readb(musb_base, MUSB_TESTMODE);
|
||||||
musb->context.testmode = musb_readb(musb_base, MUSB_TESTMODE);
|
musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs);
|
||||||
musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs);
|
|
||||||
}
|
|
||||||
musb->context.power = musb_readb(musb_base, MUSB_POWER);
|
musb->context.power = musb_readb(musb_base, MUSB_POWER);
|
||||||
musb->context.intrtxe = musb_readw(musb_base, MUSB_INTRTXE);
|
musb->context.intrtxe = musb_readw(musb_base, MUSB_INTRTXE);
|
||||||
musb->context.intrrxe = musb_readw(musb_base, MUSB_INTRRXE);
|
musb->context.intrrxe = musb_readw(musb_base, MUSB_INTRRXE);
|
||||||
@@ -2209,30 +2146,29 @@ static void musb_save_context(struct musb *musb)
|
|||||||
musb->context.index_regs[i].rxfifosz =
|
musb->context.index_regs[i].rxfifosz =
|
||||||
musb_read_rxfifosz(musb_base);
|
musb_read_rxfifosz(musb_base);
|
||||||
}
|
}
|
||||||
if (is_host_enabled(musb)) {
|
|
||||||
musb->context.index_regs[i].txtype =
|
|
||||||
musb_readb(epio, MUSB_TXTYPE);
|
|
||||||
musb->context.index_regs[i].txinterval =
|
|
||||||
musb_readb(epio, MUSB_TXINTERVAL);
|
|
||||||
musb->context.index_regs[i].rxtype =
|
|
||||||
musb_readb(epio, MUSB_RXTYPE);
|
|
||||||
musb->context.index_regs[i].rxinterval =
|
|
||||||
musb_readb(epio, MUSB_RXINTERVAL);
|
|
||||||
|
|
||||||
musb->context.index_regs[i].txfunaddr =
|
musb->context.index_regs[i].txtype =
|
||||||
musb_read_txfunaddr(musb_base, i);
|
musb_readb(epio, MUSB_TXTYPE);
|
||||||
musb->context.index_regs[i].txhubaddr =
|
musb->context.index_regs[i].txinterval =
|
||||||
musb_read_txhubaddr(musb_base, i);
|
musb_readb(epio, MUSB_TXINTERVAL);
|
||||||
musb->context.index_regs[i].txhubport =
|
musb->context.index_regs[i].rxtype =
|
||||||
musb_read_txhubport(musb_base, i);
|
musb_readb(epio, MUSB_RXTYPE);
|
||||||
|
musb->context.index_regs[i].rxinterval =
|
||||||
|
musb_readb(epio, MUSB_RXINTERVAL);
|
||||||
|
|
||||||
musb->context.index_regs[i].rxfunaddr =
|
musb->context.index_regs[i].txfunaddr =
|
||||||
musb_read_rxfunaddr(musb_base, i);
|
musb_read_txfunaddr(musb_base, i);
|
||||||
musb->context.index_regs[i].rxhubaddr =
|
musb->context.index_regs[i].txhubaddr =
|
||||||
musb_read_rxhubaddr(musb_base, i);
|
musb_read_txhubaddr(musb_base, i);
|
||||||
musb->context.index_regs[i].rxhubport =
|
musb->context.index_regs[i].txhubport =
|
||||||
musb_read_rxhubport(musb_base, i);
|
musb_read_txhubport(musb_base, i);
|
||||||
}
|
|
||||||
|
musb->context.index_regs[i].rxfunaddr =
|
||||||
|
musb_read_rxfunaddr(musb_base, i);
|
||||||
|
musb->context.index_regs[i].rxhubaddr =
|
||||||
|
musb_read_rxhubaddr(musb_base, i);
|
||||||
|
musb->context.index_regs[i].rxhubport =
|
||||||
|
musb_read_rxhubport(musb_base, i);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -2243,11 +2179,9 @@ static void musb_restore_context(struct musb *musb)
|
|||||||
void __iomem *ep_target_regs;
|
void __iomem *ep_target_regs;
|
||||||
void __iomem *epio;
|
void __iomem *epio;
|
||||||
|
|
||||||
if (is_host_enabled(musb)) {
|
musb_writew(musb_base, MUSB_FRAME, musb->context.frame);
|
||||||
musb_writew(musb_base, MUSB_FRAME, musb->context.frame);
|
musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode);
|
||||||
musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode);
|
musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl);
|
||||||
musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl);
|
|
||||||
}
|
|
||||||
musb_writeb(musb_base, MUSB_POWER, musb->context.power);
|
musb_writeb(musb_base, MUSB_POWER, musb->context.power);
|
||||||
musb_writew(musb_base, MUSB_INTRTXE, musb->context.intrtxe);
|
musb_writew(musb_base, MUSB_INTRTXE, musb->context.intrtxe);
|
||||||
musb_writew(musb_base, MUSB_INTRRXE, musb->context.intrrxe);
|
musb_writew(musb_base, MUSB_INTRRXE, musb->context.intrrxe);
|
||||||
@@ -2286,33 +2220,31 @@ static void musb_restore_context(struct musb *musb)
|
|||||||
musb->context.index_regs[i].rxfifoadd);
|
musb->context.index_regs[i].rxfifoadd);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (is_host_enabled(musb)) {
|
musb_writeb(epio, MUSB_TXTYPE,
|
||||||
musb_writeb(epio, MUSB_TXTYPE,
|
|
||||||
musb->context.index_regs[i].txtype);
|
musb->context.index_regs[i].txtype);
|
||||||
musb_writeb(epio, MUSB_TXINTERVAL,
|
musb_writeb(epio, MUSB_TXINTERVAL,
|
||||||
musb->context.index_regs[i].txinterval);
|
musb->context.index_regs[i].txinterval);
|
||||||
musb_writeb(epio, MUSB_RXTYPE,
|
musb_writeb(epio, MUSB_RXTYPE,
|
||||||
musb->context.index_regs[i].rxtype);
|
musb->context.index_regs[i].rxtype);
|
||||||
musb_writeb(epio, MUSB_RXINTERVAL,
|
musb_writeb(epio, MUSB_RXINTERVAL,
|
||||||
|
|
||||||
musb->context.index_regs[i].rxinterval);
|
musb->context.index_regs[i].rxinterval);
|
||||||
musb_write_txfunaddr(musb_base, i,
|
musb_write_txfunaddr(musb_base, i,
|
||||||
musb->context.index_regs[i].txfunaddr);
|
musb->context.index_regs[i].txfunaddr);
|
||||||
musb_write_txhubaddr(musb_base, i,
|
musb_write_txhubaddr(musb_base, i,
|
||||||
musb->context.index_regs[i].txhubaddr);
|
musb->context.index_regs[i].txhubaddr);
|
||||||
musb_write_txhubport(musb_base, i,
|
musb_write_txhubport(musb_base, i,
|
||||||
musb->context.index_regs[i].txhubport);
|
musb->context.index_regs[i].txhubport);
|
||||||
|
|
||||||
ep_target_regs =
|
ep_target_regs =
|
||||||
musb_read_target_reg_base(i, musb_base);
|
musb_read_target_reg_base(i, musb_base);
|
||||||
|
|
||||||
musb_write_rxfunaddr(ep_target_regs,
|
musb_write_rxfunaddr(ep_target_regs,
|
||||||
musb->context.index_regs[i].rxfunaddr);
|
musb->context.index_regs[i].rxfunaddr);
|
||||||
musb_write_rxhubaddr(ep_target_regs,
|
musb_write_rxhubaddr(ep_target_regs,
|
||||||
musb->context.index_regs[i].rxhubaddr);
|
musb->context.index_regs[i].rxhubaddr);
|
||||||
musb_write_rxhubport(ep_target_regs,
|
musb_write_rxhubport(ep_target_regs,
|
||||||
musb->context.index_regs[i].rxhubport);
|
musb->context.index_regs[i].rxhubport);
|
||||||
}
|
|
||||||
}
|
}
|
||||||
musb_writeb(musb_base, MUSB_INDEX, musb->context.index);
|
musb_writeb(musb_base, MUSB_INDEX, musb->context.index);
|
||||||
}
|
}
|
||||||
|
@@ -71,10 +71,6 @@ struct musb_ep;
|
|||||||
#include <linux/usb/hcd.h>
|
#include <linux/usb/hcd.h>
|
||||||
#include "musb_host.h"
|
#include "musb_host.h"
|
||||||
|
|
||||||
#define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
|
|
||||||
#define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
|
|
||||||
#define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
|
|
||||||
|
|
||||||
/* NOTE: otg and peripheral-only state machines start at B_IDLE.
|
/* NOTE: otg and peripheral-only state machines start at B_IDLE.
|
||||||
* OTG or host-only go to A_IDLE when ID is sensed.
|
* OTG or host-only go to A_IDLE when ID is sensed.
|
||||||
*/
|
*/
|
||||||
@@ -376,7 +372,6 @@ struct musb {
|
|||||||
u16 epmask;
|
u16 epmask;
|
||||||
u8 nr_endpoints;
|
u8 nr_endpoints;
|
||||||
|
|
||||||
u8 board_mode; /* enum musb_mode */
|
|
||||||
int (*board_set_power)(int state);
|
int (*board_set_power)(int state);
|
||||||
|
|
||||||
u8 min_power; /* vbus for periph, in mA/2 */
|
u8 min_power; /* vbus for periph, in mA/2 */
|
||||||
|
@@ -137,9 +137,8 @@ static void dsps_musb_enable(struct musb *musb)
|
|||||||
dsps_writel(reg_base, wrp->epintr_set, epmask);
|
dsps_writel(reg_base, wrp->epintr_set, epmask);
|
||||||
dsps_writel(reg_base, wrp->coreintr_set, coremask);
|
dsps_writel(reg_base, wrp->coreintr_set, coremask);
|
||||||
/* Force the DRVVBUS IRQ so we can start polling for ID change. */
|
/* Force the DRVVBUS IRQ so we can start polling for ID change. */
|
||||||
if (is_otg_enabled(musb))
|
dsps_writel(reg_base, wrp->coreintr_set,
|
||||||
dsps_writel(reg_base, wrp->coreintr_set,
|
(1 << wrp->drvvbus) << wrp->usb_shift);
|
||||||
(1 << wrp->drvvbus) << wrp->usb_shift);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
@@ -200,9 +199,6 @@ static void otg_timer(unsigned long _musb)
|
|||||||
MUSB_INTR_VBUSERROR << wrp->usb_shift);
|
MUSB_INTR_VBUSERROR << wrp->usb_shift);
|
||||||
break;
|
break;
|
||||||
case OTG_STATE_B_IDLE:
|
case OTG_STATE_B_IDLE:
|
||||||
if (!is_peripheral_enabled(musb))
|
|
||||||
break;
|
|
||||||
|
|
||||||
devctl = dsps_readb(mregs, MUSB_DEVCTL);
|
devctl = dsps_readb(mregs, MUSB_DEVCTL);
|
||||||
if (devctl & MUSB_DEVCTL_BDEVICE)
|
if (devctl & MUSB_DEVCTL_BDEVICE)
|
||||||
mod_timer(&glue->timer,
|
mod_timer(&glue->timer,
|
||||||
@@ -223,9 +219,6 @@ static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
|
|||||||
struct dsps_glue *glue = platform_get_drvdata(pdev);
|
struct dsps_glue *glue = platform_get_drvdata(pdev);
|
||||||
static unsigned long last_timer;
|
static unsigned long last_timer;
|
||||||
|
|
||||||
if (!is_otg_enabled(musb))
|
|
||||||
return;
|
|
||||||
|
|
||||||
if (timeout == 0)
|
if (timeout == 0)
|
||||||
timeout = jiffies + msecs_to_jiffies(3);
|
timeout = jiffies + msecs_to_jiffies(3);
|
||||||
|
|
||||||
@@ -293,7 +286,7 @@ static irqreturn_t dsps_interrupt(int irq, void *hci)
|
|||||||
* value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
|
* value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
|
||||||
* Also, DRVVBUS pulses for SRP (but not at 5V) ...
|
* Also, DRVVBUS pulses for SRP (but not at 5V) ...
|
||||||
*/
|
*/
|
||||||
if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb))
|
if (usbintr & MUSB_INTR_BABBLE)
|
||||||
pr_info("CAUTION: musb: Babble Interrupt Occured\n");
|
pr_info("CAUTION: musb: Babble Interrupt Occured\n");
|
||||||
|
|
||||||
if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
|
if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
|
||||||
@@ -302,8 +295,7 @@ static irqreturn_t dsps_interrupt(int irq, void *hci)
|
|||||||
u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
|
u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
|
||||||
int err;
|
int err;
|
||||||
|
|
||||||
err = is_host_enabled(musb) && (musb->int_usb &
|
err = musb->int_usb & MUSB_INTR_VBUSERROR;
|
||||||
MUSB_INTR_VBUSERROR);
|
|
||||||
if (err) {
|
if (err) {
|
||||||
/*
|
/*
|
||||||
* The Mentor core doesn't debounce VBUS as needed
|
* The Mentor core doesn't debounce VBUS as needed
|
||||||
@@ -321,7 +313,7 @@ static irqreturn_t dsps_interrupt(int irq, void *hci)
|
|||||||
mod_timer(&glue->timer,
|
mod_timer(&glue->timer,
|
||||||
jiffies + wrp->poll_seconds * HZ);
|
jiffies + wrp->poll_seconds * HZ);
|
||||||
WARNING("VBUS error workaround (delay coming)\n");
|
WARNING("VBUS error workaround (delay coming)\n");
|
||||||
} else if (is_host_enabled(musb) && drvvbus) {
|
} else if (drvvbus) {
|
||||||
musb->is_active = 1;
|
musb->is_active = 1;
|
||||||
MUSB_HST_MODE(musb);
|
MUSB_HST_MODE(musb);
|
||||||
musb->xceiv->otg->default_a = 1;
|
musb->xceiv->otg->default_a = 1;
|
||||||
@@ -352,7 +344,7 @@ static irqreturn_t dsps_interrupt(int irq, void *hci)
|
|||||||
dsps_writel(reg_base, wrp->eoi, 1);
|
dsps_writel(reg_base, wrp->eoi, 1);
|
||||||
|
|
||||||
/* Poll for ID change */
|
/* Poll for ID change */
|
||||||
if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
|
if (musb->xceiv->state == OTG_STATE_B_IDLE)
|
||||||
mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
|
mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&musb->lock, flags);
|
spin_unlock_irqrestore(&musb->lock, flags);
|
||||||
@@ -388,8 +380,7 @@ static int dsps_musb_init(struct musb *musb)
|
|||||||
goto err0;
|
goto err0;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (is_host_enabled(musb))
|
setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
|
||||||
setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
|
|
||||||
|
|
||||||
/* Reset the musb */
|
/* Reset the musb */
|
||||||
dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
|
dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
|
||||||
@@ -423,8 +414,7 @@ static int dsps_musb_exit(struct musb *musb)
|
|||||||
struct platform_device *pdev = to_platform_device(dev->parent);
|
struct platform_device *pdev = to_platform_device(dev->parent);
|
||||||
struct dsps_glue *glue = platform_get_drvdata(pdev);
|
struct dsps_glue *glue = platform_get_drvdata(pdev);
|
||||||
|
|
||||||
if (is_host_enabled(musb))
|
del_timer_sync(&glue->timer);
|
||||||
del_timer_sync(&glue->timer);
|
|
||||||
|
|
||||||
/* Shutdown the on-chip PHY and its PLL. */
|
/* Shutdown the on-chip PHY and its PLL. */
|
||||||
if (data->set_phy_power)
|
if (data->set_phy_power)
|
||||||
|
@@ -1864,8 +1864,7 @@ int __devinit musb_gadget_setup(struct musb *musb)
|
|||||||
musb->g.dev.release = musb_gadget_release;
|
musb->g.dev.release = musb_gadget_release;
|
||||||
musb->g.name = musb_driver_name;
|
musb->g.name = musb_driver_name;
|
||||||
|
|
||||||
if (is_otg_enabled(musb))
|
musb->g.is_otg = 1;
|
||||||
musb->g.is_otg = 1;
|
|
||||||
|
|
||||||
musb_g_init_endpoints(musb);
|
musb_g_init_endpoints(musb);
|
||||||
|
|
||||||
@@ -1911,11 +1910,14 @@ static int musb_gadget_start(struct usb_gadget *g,
|
|||||||
{
|
{
|
||||||
struct musb *musb = gadget_to_musb(g);
|
struct musb *musb = gadget_to_musb(g);
|
||||||
struct usb_otg *otg = musb->xceiv->otg;
|
struct usb_otg *otg = musb->xceiv->otg;
|
||||||
|
struct usb_hcd *hcd = musb_to_hcd(musb);
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
int retval = -EINVAL;
|
int retval = 0;
|
||||||
|
|
||||||
if (driver->max_speed < USB_SPEED_HIGH)
|
if (driver->max_speed < USB_SPEED_HIGH) {
|
||||||
goto err0;
|
retval = -EINVAL;
|
||||||
|
goto err;
|
||||||
|
}
|
||||||
|
|
||||||
pm_runtime_get_sync(musb->controller);
|
pm_runtime_get_sync(musb->controller);
|
||||||
|
|
||||||
@@ -1929,49 +1931,30 @@ static int musb_gadget_start(struct usb_gadget *g,
|
|||||||
|
|
||||||
otg_set_peripheral(otg, &musb->g);
|
otg_set_peripheral(otg, &musb->g);
|
||||||
musb->xceiv->state = OTG_STATE_B_IDLE;
|
musb->xceiv->state = OTG_STATE_B_IDLE;
|
||||||
|
|
||||||
/*
|
|
||||||
* FIXME this ignores the softconnect flag. Drivers are
|
|
||||||
* allowed hold the peripheral inactive until for example
|
|
||||||
* userspace hooks up printer hardware or DSP codecs, so
|
|
||||||
* hosts only see fully functional devices.
|
|
||||||
*/
|
|
||||||
|
|
||||||
if (!is_otg_enabled(musb))
|
|
||||||
musb_start(musb);
|
|
||||||
|
|
||||||
spin_unlock_irqrestore(&musb->lock, flags);
|
spin_unlock_irqrestore(&musb->lock, flags);
|
||||||
|
|
||||||
if (is_otg_enabled(musb)) {
|
/* REVISIT: funcall to other code, which also
|
||||||
struct usb_hcd *hcd = musb_to_hcd(musb);
|
* handles power budgeting ... this way also
|
||||||
|
* ensures HdrcStart is indirectly called.
|
||||||
dev_dbg(musb->controller, "OTG startup...\n");
|
*/
|
||||||
|
retval = usb_add_hcd(hcd, 0, 0);
|
||||||
/* REVISIT: funcall to other code, which also
|
if (retval < 0) {
|
||||||
* handles power budgeting ... this way also
|
dev_dbg(musb->controller, "add_hcd failed, %d\n", retval);
|
||||||
* ensures HdrcStart is indirectly called.
|
goto err;
|
||||||
*/
|
|
||||||
retval = usb_add_hcd(musb_to_hcd(musb), 0, 0);
|
|
||||||
if (retval < 0) {
|
|
||||||
dev_dbg(musb->controller, "add_hcd failed, %d\n", retval);
|
|
||||||
goto err2;
|
|
||||||
}
|
|
||||||
|
|
||||||
if ((musb->xceiv->last_event == USB_EVENT_ID)
|
|
||||||
&& otg->set_vbus)
|
|
||||||
otg_set_vbus(otg, 1);
|
|
||||||
|
|
||||||
hcd->self.uses_pio_for_control = 1;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if ((musb->xceiv->last_event == USB_EVENT_ID)
|
||||||
|
&& otg->set_vbus)
|
||||||
|
otg_set_vbus(otg, 1);
|
||||||
|
|
||||||
|
hcd->self.uses_pio_for_control = 1;
|
||||||
|
|
||||||
if (musb->xceiv->last_event == USB_EVENT_NONE)
|
if (musb->xceiv->last_event == USB_EVENT_NONE)
|
||||||
pm_runtime_put(musb->controller);
|
pm_runtime_put(musb->controller);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
err2:
|
err:
|
||||||
if (!is_otg_enabled(musb))
|
|
||||||
musb_stop(musb);
|
|
||||||
err0:
|
|
||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -2049,16 +2032,12 @@ static int musb_gadget_stop(struct usb_gadget *g,
|
|||||||
musb_platform_try_idle(musb, 0);
|
musb_platform_try_idle(musb, 0);
|
||||||
spin_unlock_irqrestore(&musb->lock, flags);
|
spin_unlock_irqrestore(&musb->lock, flags);
|
||||||
|
|
||||||
if (is_otg_enabled(musb)) {
|
usb_remove_hcd(musb_to_hcd(musb));
|
||||||
usb_remove_hcd(musb_to_hcd(musb));
|
/*
|
||||||
/* FIXME we need to be able to register another
|
* FIXME we need to be able to register another
|
||||||
* gadget driver here and have everything work;
|
* gadget driver here and have everything work;
|
||||||
* that currently misbehaves.
|
* that currently misbehaves.
|
||||||
*/
|
*/
|
||||||
}
|
|
||||||
|
|
||||||
if (!is_otg_enabled(musb))
|
|
||||||
musb_stop(musb);
|
|
||||||
|
|
||||||
pm_runtime_put(musb->controller);
|
pm_runtime_put(musb->controller);
|
||||||
|
|
||||||
@@ -2220,13 +2199,11 @@ __acquires(musb->lock)
|
|||||||
if (devctl & MUSB_DEVCTL_BDEVICE) {
|
if (devctl & MUSB_DEVCTL_BDEVICE) {
|
||||||
musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
|
musb->xceiv->state = OTG_STATE_B_PERIPHERAL;
|
||||||
musb->g.is_a_peripheral = 0;
|
musb->g.is_a_peripheral = 0;
|
||||||
} else if (is_otg_enabled(musb)) {
|
} else {
|
||||||
musb->xceiv->state = OTG_STATE_A_PERIPHERAL;
|
musb->xceiv->state = OTG_STATE_A_PERIPHERAL;
|
||||||
musb->g.is_a_peripheral = 1;
|
musb->g.is_a_peripheral = 1;
|
||||||
} else
|
}
|
||||||
WARN_ON(1);
|
|
||||||
|
|
||||||
/* start with default limits on VBUS power draw */
|
/* start with default limits on VBUS power draw */
|
||||||
(void) musb_gadget_vbus_draw(&musb->g,
|
(void) musb_gadget_vbus_draw(&musb->g, 8);
|
||||||
is_otg_enabled(musb) ? 8 : 100);
|
|
||||||
}
|
}
|
||||||
|
@@ -81,8 +81,7 @@ static void musb_port_suspend(struct musb *musb, bool do_suspend)
|
|||||||
switch (musb->xceiv->state) {
|
switch (musb->xceiv->state) {
|
||||||
case OTG_STATE_A_HOST:
|
case OTG_STATE_A_HOST:
|
||||||
musb->xceiv->state = OTG_STATE_A_SUSPEND;
|
musb->xceiv->state = OTG_STATE_A_SUSPEND;
|
||||||
musb->is_active = is_otg_enabled(musb)
|
musb->is_active = otg->host->b_hnp_enable;
|
||||||
&& otg->host->b_hnp_enable;
|
|
||||||
if (musb->is_active)
|
if (musb->is_active)
|
||||||
mod_timer(&musb->otg_timer, jiffies
|
mod_timer(&musb->otg_timer, jiffies
|
||||||
+ msecs_to_jiffies(
|
+ msecs_to_jiffies(
|
||||||
@@ -91,8 +90,7 @@ static void musb_port_suspend(struct musb *musb, bool do_suspend)
|
|||||||
break;
|
break;
|
||||||
case OTG_STATE_B_HOST:
|
case OTG_STATE_B_HOST:
|
||||||
musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
|
musb->xceiv->state = OTG_STATE_B_WAIT_ACON;
|
||||||
musb->is_active = is_otg_enabled(musb)
|
musb->is_active = otg->host->b_hnp_enable;
|
||||||
&& otg->host->b_hnp_enable;
|
|
||||||
musb_platform_try_idle(musb, 0);
|
musb_platform_try_idle(musb, 0);
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
@@ -190,8 +188,7 @@ void musb_root_disconnect(struct musb *musb)
|
|||||||
|
|
||||||
switch (musb->xceiv->state) {
|
switch (musb->xceiv->state) {
|
||||||
case OTG_STATE_A_SUSPEND:
|
case OTG_STATE_A_SUSPEND:
|
||||||
if (is_otg_enabled(musb)
|
if (otg->host->b_hnp_enable) {
|
||||||
&& otg->host->b_hnp_enable) {
|
|
||||||
musb->xceiv->state = OTG_STATE_A_PERIPHERAL;
|
musb->xceiv->state = OTG_STATE_A_PERIPHERAL;
|
||||||
musb->g.is_a_peripheral = 1;
|
musb->g.is_a_peripheral = 1;
|
||||||
break;
|
break;
|
||||||
@@ -273,7 +270,7 @@ int musb_hub_control(
|
|||||||
musb_port_suspend(musb, false);
|
musb_port_suspend(musb, false);
|
||||||
break;
|
break;
|
||||||
case USB_PORT_FEAT_POWER:
|
case USB_PORT_FEAT_POWER:
|
||||||
if (!(is_otg_enabled(musb) && hcd->self.is_b_host))
|
if (!hcd->self.is_b_host)
|
||||||
musb_platform_set_vbus(musb, 0);
|
musb_platform_set_vbus(musb, 0);
|
||||||
break;
|
break;
|
||||||
case USB_PORT_FEAT_C_CONNECTION:
|
case USB_PORT_FEAT_C_CONNECTION:
|
||||||
@@ -369,7 +366,7 @@ int musb_hub_control(
|
|||||||
* initialization logic, e.g. for OTG, or change any
|
* initialization logic, e.g. for OTG, or change any
|
||||||
* logic relating to VBUS power-up.
|
* logic relating to VBUS power-up.
|
||||||
*/
|
*/
|
||||||
if (!(is_otg_enabled(musb) && hcd->self.is_b_host))
|
if (!hcd->self.is_b_host)
|
||||||
musb_start(musb);
|
musb_start(musb);
|
||||||
break;
|
break;
|
||||||
case USB_PORT_FEAT_RESET:
|
case USB_PORT_FEAT_RESET:
|
||||||
|
@@ -258,7 +258,7 @@ static void omap_musb_set_mailbox(struct omap2430_glue *glue)
|
|||||||
otg->default_a = true;
|
otg->default_a = true;
|
||||||
musb->xceiv->state = OTG_STATE_A_IDLE;
|
musb->xceiv->state = OTG_STATE_A_IDLE;
|
||||||
musb->xceiv->last_event = USB_EVENT_ID;
|
musb->xceiv->last_event = USB_EVENT_ID;
|
||||||
if (!is_otg_enabled(musb) || musb->gadget_driver) {
|
if (musb->gadget_driver) {
|
||||||
pm_runtime_get_sync(dev);
|
pm_runtime_get_sync(dev);
|
||||||
usb_phy_init(musb->xceiv);
|
usb_phy_init(musb->xceiv);
|
||||||
omap2430_musb_set_vbus(musb, 1);
|
omap2430_musb_set_vbus(musb, 1);
|
||||||
@@ -281,11 +281,10 @@ static void omap_musb_set_mailbox(struct omap2430_glue *glue)
|
|||||||
dev_dbg(dev, "VBUS Disconnect\n");
|
dev_dbg(dev, "VBUS Disconnect\n");
|
||||||
|
|
||||||
musb->xceiv->last_event = USB_EVENT_NONE;
|
musb->xceiv->last_event = USB_EVENT_NONE;
|
||||||
if (is_otg_enabled(musb) || is_peripheral_enabled(musb))
|
if (musb->gadget_driver) {
|
||||||
if (musb->gadget_driver) {
|
pm_runtime_mark_last_busy(dev);
|
||||||
pm_runtime_mark_last_busy(dev);
|
pm_runtime_put_autosuspend(dev);
|
||||||
pm_runtime_put_autosuspend(dev);
|
}
|
||||||
}
|
|
||||||
|
|
||||||
if (data->interface_type == MUSB_INTERFACE_UTMI) {
|
if (data->interface_type == MUSB_INTERFACE_UTMI) {
|
||||||
if (musb->xceiv->otg->set_vbus)
|
if (musb->xceiv->otg->set_vbus)
|
||||||
|
@@ -437,14 +437,13 @@ static void musb_do_idle(unsigned long _musb)
|
|||||||
if (is_host_active(musb) && (musb->port1_status >> 16))
|
if (is_host_active(musb) && (musb->port1_status >> 16))
|
||||||
goto done;
|
goto done;
|
||||||
|
|
||||||
if (is_peripheral_enabled(musb) && !musb->gadget_driver) {
|
if (!musb->gadget_driver) {
|
||||||
wakeups = 0;
|
wakeups = 0;
|
||||||
} else {
|
} else {
|
||||||
wakeups = TUSB_PRCM_WHOSTDISCON
|
wakeups = TUSB_PRCM_WHOSTDISCON
|
||||||
| TUSB_PRCM_WBUS
|
| TUSB_PRCM_WBUS
|
||||||
| TUSB_PRCM_WVBUS;
|
| TUSB_PRCM_WVBUS;
|
||||||
if (is_otg_enabled(musb))
|
wakeups |= TUSB_PRCM_WID;
|
||||||
wakeups |= TUSB_PRCM_WID;
|
|
||||||
}
|
}
|
||||||
tusb_allow_idle(musb, wakeups);
|
tusb_allow_idle(musb, wakeups);
|
||||||
}
|
}
|
||||||
@@ -582,21 +581,12 @@ static void tusb_musb_set_vbus(struct musb *musb, int is_on)
|
|||||||
*
|
*
|
||||||
* Note that if a mini-A cable is plugged in the ID line will stay down as
|
* Note that if a mini-A cable is plugged in the ID line will stay down as
|
||||||
* the weak ID pull-up is not able to pull the ID up.
|
* the weak ID pull-up is not able to pull the ID up.
|
||||||
*
|
|
||||||
* REVISIT: It would be possible to add support for changing between host
|
|
||||||
* and peripheral modes in non-OTG configurations by reconfiguring hardware
|
|
||||||
* and then setting musb->board_mode. For now, only support OTG mode.
|
|
||||||
*/
|
*/
|
||||||
static int tusb_musb_set_mode(struct musb *musb, u8 musb_mode)
|
static int tusb_musb_set_mode(struct musb *musb, u8 musb_mode)
|
||||||
{
|
{
|
||||||
void __iomem *tbase = musb->ctrl_base;
|
void __iomem *tbase = musb->ctrl_base;
|
||||||
u32 otg_stat, phy_otg_ctrl, phy_otg_ena, dev_conf;
|
u32 otg_stat, phy_otg_ctrl, phy_otg_ena, dev_conf;
|
||||||
|
|
||||||
if (musb->board_mode != MUSB_OTG) {
|
|
||||||
ERR("Changing mode currently only supported in OTG mode\n");
|
|
||||||
return -EINVAL;
|
|
||||||
}
|
|
||||||
|
|
||||||
otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
|
otg_stat = musb_readl(tbase, TUSB_DEV_OTG_STAT);
|
||||||
phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
|
phy_otg_ctrl = musb_readl(tbase, TUSB_PHY_OTG_CTRL);
|
||||||
phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
|
phy_otg_ena = musb_readl(tbase, TUSB_PHY_OTG_CTRL_ENABLE);
|
||||||
@@ -652,10 +642,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
|
|||||||
if ((int_src & TUSB_INT_SRC_ID_STATUS_CHNG)) {
|
if ((int_src & TUSB_INT_SRC_ID_STATUS_CHNG)) {
|
||||||
int default_a;
|
int default_a;
|
||||||
|
|
||||||
if (is_otg_enabled(musb))
|
default_a = !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS);
|
||||||
default_a = !(otg_stat & TUSB_DEV_OTG_STAT_ID_STATUS);
|
|
||||||
else
|
|
||||||
default_a = is_host_enabled(musb);
|
|
||||||
dev_dbg(musb->controller, "Default-%c\n", default_a ? 'A' : 'B');
|
dev_dbg(musb->controller, "Default-%c\n", default_a ? 'A' : 'B');
|
||||||
otg->default_a = default_a;
|
otg->default_a = default_a;
|
||||||
tusb_musb_set_vbus(musb, default_a);
|
tusb_musb_set_vbus(musb, default_a);
|
||||||
@@ -669,8 +656,7 @@ tusb_otg_ints(struct musb *musb, u32 int_src, void __iomem *tbase)
|
|||||||
if (int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG) {
|
if (int_src & TUSB_INT_SRC_VBUS_SENSE_CHNG) {
|
||||||
|
|
||||||
/* B-dev state machine: no vbus ~= disconnect */
|
/* B-dev state machine: no vbus ~= disconnect */
|
||||||
if ((is_otg_enabled(musb) && !otg->default_a)
|
if (!otg->default_a) {
|
||||||
|| !is_host_enabled(musb)) {
|
|
||||||
/* ? musb_root_disconnect(musb); */
|
/* ? musb_root_disconnect(musb); */
|
||||||
musb->port1_status &=
|
musb->port1_status &=
|
||||||
~(USB_PORT_STAT_CONNECTION
|
~(USB_PORT_STAT_CONNECTION
|
||||||
@@ -1119,10 +1105,8 @@ static int tusb_musb_init(struct musb *musb)
|
|||||||
}
|
}
|
||||||
musb->isr = tusb_musb_interrupt;
|
musb->isr = tusb_musb_interrupt;
|
||||||
|
|
||||||
if (is_peripheral_enabled(musb)) {
|
musb->xceiv->set_power = tusb_draw_power;
|
||||||
musb->xceiv->set_power = tusb_draw_power;
|
the_musb = musb;
|
||||||
the_musb = musb;
|
|
||||||
}
|
|
||||||
|
|
||||||
setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
|
setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user