typhoon: trivial endianness annotations
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Al Viro
David S. Miller
@ -64,19 +64,19 @@ struct transmit_ring {
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*/
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struct typhoon_indexes {
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/* The first four are written by the host, and read by the NIC */
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volatile u32 rxHiCleared;
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volatile u32 rxLoCleared;
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volatile u32 rxBuffReady;
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volatile u32 respCleared;
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volatile __le32 rxHiCleared;
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volatile __le32 rxLoCleared;
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volatile __le32 rxBuffReady;
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volatile __le32 respCleared;
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/* The remaining are written by the NIC, and read by the host */
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volatile u32 txLoCleared;
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volatile u32 txHiCleared;
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volatile u32 rxLoReady;
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volatile u32 rxBuffCleared;
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volatile u32 cmdCleared;
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volatile u32 respReady;
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volatile u32 rxHiReady;
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volatile __le32 txLoCleared;
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volatile __le32 txHiCleared;
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volatile __le32 rxLoReady;
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volatile __u32 rxBuffCleared; /* AV: really? */
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volatile __le32 cmdCleared;
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volatile __le32 respReady;
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volatile __le32 rxHiReady;
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} __attribute__ ((packed));
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/* The host<->Typhoon interface
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@ -100,31 +100,31 @@ struct typhoon_indexes {
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* be zero.
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*/
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struct typhoon_interface {
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u32 ringIndex;
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u32 ringIndexHi;
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u32 txLoAddr;
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u32 txLoAddrHi;
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u32 txLoSize;
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u32 txHiAddr;
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u32 txHiAddrHi;
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u32 txHiSize;
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u32 rxLoAddr;
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u32 rxLoAddrHi;
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u32 rxLoSize;
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u32 rxBuffAddr;
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u32 rxBuffAddrHi;
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u32 rxBuffSize;
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u32 cmdAddr;
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u32 cmdAddrHi;
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u32 cmdSize;
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u32 respAddr;
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u32 respAddrHi;
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u32 respSize;
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u32 zeroAddr;
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u32 zeroAddrHi;
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u32 rxHiAddr;
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u32 rxHiAddrHi;
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u32 rxHiSize;
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__le32 ringIndex;
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__le32 ringIndexHi;
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__le32 txLoAddr;
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__le32 txLoAddrHi;
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__le32 txLoSize;
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__le32 txHiAddr;
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__le32 txHiAddrHi;
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__le32 txHiSize;
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__le32 rxLoAddr;
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__le32 rxLoAddrHi;
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__le32 rxLoSize;
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__le32 rxBuffAddr;
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__le32 rxBuffAddrHi;
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__le32 rxBuffSize;
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__le32 cmdAddr;
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__le32 cmdAddrHi;
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__le32 cmdSize;
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__le32 respAddr;
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__le32 respAddrHi;
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__le32 respSize;
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__le32 zeroAddr;
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__le32 zeroAddrHi;
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__le32 rxHiAddr;
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__le32 rxHiAddrHi;
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__le32 rxHiSize;
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} __attribute__ ((packed));
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/* The Typhoon transmit/fragment descriptor
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@ -165,10 +165,10 @@ struct tx_desc {
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#define TYPHOON_RX_ERROR 0x40
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#define TYPHOON_DESC_VALID 0x80
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u8 numDesc;
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u16 len;
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__le16 len;
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u32 addr;
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u32 addrHi;
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u32 processFlags;
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__le32 processFlags;
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#define TYPHOON_TX_PF_NO_CRC __constant_cpu_to_le32(0x00000001)
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#define TYPHOON_TX_PF_IP_CHKSUM __constant_cpu_to_le32(0x00000002)
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#define TYPHOON_TX_PF_TCP_CHKSUM __constant_cpu_to_le32(0x00000004)
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@ -197,12 +197,12 @@ struct tx_desc {
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struct tcpopt_desc {
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u8 flags;
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u8 numDesc;
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u16 mss_flags;
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__le16 mss_flags;
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#define TYPHOON_TSO_FIRST __constant_cpu_to_le16(0x1000)
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#define TYPHOON_TSO_LAST __constant_cpu_to_le16(0x2000)
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u32 respAddrLo;
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u32 bytesTx;
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u32 status;
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__le32 respAddrLo;
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__le32 bytesTx;
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__le32 status;
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} __attribute__ ((packed));
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/* The IPSEC Offload descriptor
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@ -216,12 +216,12 @@ struct tcpopt_desc {
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struct ipsec_desc {
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u8 flags;
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u8 numDesc;
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u16 ipsecFlags;
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__le16 ipsecFlags;
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#define TYPHOON_IPSEC_GEN_IV __constant_cpu_to_le16(0x0000)
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#define TYPHOON_IPSEC_USE_IV __constant_cpu_to_le16(0x0001)
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u32 sa1;
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u32 sa2;
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u32 reserved;
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__le32 sa1;
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__le32 sa2;
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__le32 reserved;
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} __attribute__ ((packed));
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/* The Typhoon receive descriptor (Updated by NIC)
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@ -239,10 +239,10 @@ struct ipsec_desc {
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struct rx_desc {
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u8 flags;
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u8 numDesc;
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u16 frameLen;
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__le16 frameLen;
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u32 addr;
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u32 addrHi;
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u32 rxStatus;
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__le32 rxStatus;
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#define TYPHOON_RX_ERR_INTERNAL __constant_cpu_to_le32(0x00000000)
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#define TYPHOON_RX_ERR_FIFO_UNDERRUN __constant_cpu_to_le32(0x00000001)
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#define TYPHOON_RX_ERR_BAD_SSD __constant_cpu_to_le32(0x00000002)
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@ -264,10 +264,10 @@ struct rx_desc {
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#define TYPHOON_RX_IP_CHK_GOOD __constant_cpu_to_le32(0x00000100)
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#define TYPHOON_RX_TCP_CHK_GOOD __constant_cpu_to_le32(0x00000200)
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#define TYPHOON_RX_UDP_CHK_GOOD __constant_cpu_to_le32(0x00000400)
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u16 filterResults;
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__le16 filterResults;
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#define TYPHOON_RX_FILTER_MASK __constant_cpu_to_le16(0x7fff)
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#define TYPHOON_RX_FILTERED __constant_cpu_to_le16(0x8000)
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u16 ipsecResults;
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__le16 ipsecResults;
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#define TYPHOON_RX_OUTER_AH_GOOD __constant_cpu_to_le16(0x0001)
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#define TYPHOON_RX_OUTER_ESP_GOOD __constant_cpu_to_le16(0x0002)
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#define TYPHOON_RX_INNER_AH_GOOD __constant_cpu_to_le16(0x0004)
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@ -278,7 +278,7 @@ struct rx_desc {
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#define TYPHOON_RX_INNER_ESP_FAIL __constant_cpu_to_le16(0x0080)
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#define TYPHOON_RX_UNKNOWN_SA __constant_cpu_to_le16(0x0100)
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#define TYPHOON_RX_ESP_FORMAT_ERR __constant_cpu_to_le16(0x0200)
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u32 vlanTag;
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__be32 vlanTag;
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} __attribute__ ((packed));
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/* The Typhoon free buffer descriptor, used to give a buffer to the NIC
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@ -292,8 +292,8 @@ struct rx_desc {
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* from the NIC
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*/
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struct rx_free {
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u32 physAddr;
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u32 physAddrHi;
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__le32 physAddr;
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__le32 physAddrHi;
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u32 virtAddr;
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u32 virtAddrHi;
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} __attribute__ ((packed));
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@ -312,7 +312,7 @@ struct rx_free {
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struct cmd_desc {
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u8 flags;
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u8 numDesc;
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u16 cmd;
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__le16 cmd;
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#define TYPHOON_CMD_TX_ENABLE __constant_cpu_to_le16(0x0001)
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#define TYPHOON_CMD_TX_DISABLE __constant_cpu_to_le16(0x0002)
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#define TYPHOON_CMD_RX_ENABLE __constant_cpu_to_le16(0x0003)
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@ -339,9 +339,9 @@ struct cmd_desc {
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#define TYPHOON_CMD_GET_IPSEC_ENABLE __constant_cpu_to_le16(0x0067)
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#define TYPHOON_CMD_GET_CMD_LVL __constant_cpu_to_le16(0x0069)
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u16 seqNo;
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u16 parm1;
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u32 parm2;
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u32 parm3;
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__le16 parm1;
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__le32 parm2;
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__le32 parm3;
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} __attribute__ ((packed));
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/* The Typhoon response descriptor, see command descriptor for details
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@ -349,11 +349,11 @@ struct cmd_desc {
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struct resp_desc {
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u8 flags;
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u8 numDesc;
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u16 cmd;
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u16 seqNo;
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u16 parm1;
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u32 parm2;
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u32 parm3;
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__le16 cmd;
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__le16 seqNo;
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__le16 parm1;
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__le32 parm2;
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__le32 parm3;
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} __attribute__ ((packed));
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#define INIT_COMMAND_NO_RESPONSE(x, command) \
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@ -386,31 +386,31 @@ struct resp_desc {
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struct stats_resp {
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u8 flags;
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u8 numDesc;
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u16 cmd;
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u16 seqNo;
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u16 unused;
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u32 txPackets;
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u64 txBytes;
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u32 txDeferred;
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u32 txLateCollisions;
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u32 txCollisions;
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u32 txCarrierLost;
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u32 txMultipleCollisions;
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u32 txExcessiveCollisions;
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u32 txFifoUnderruns;
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u32 txMulticastTxOverflows;
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u32 txFiltered;
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u32 rxPacketsGood;
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u64 rxBytesGood;
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u32 rxFifoOverruns;
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u32 BadSSD;
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u32 rxCrcErrors;
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u32 rxOversized;
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u32 rxBroadcast;
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u32 rxMulticast;
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u32 rxOverflow;
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u32 rxFiltered;
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u32 linkStatus;
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__le16 cmd;
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__le16 seqNo;
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__le16 unused;
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__le32 txPackets;
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__le64 txBytes;
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__le32 txDeferred;
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__le32 txLateCollisions;
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__le32 txCollisions;
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__le32 txCarrierLost;
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__le32 txMultipleCollisions;
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__le32 txExcessiveCollisions;
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__le32 txFifoUnderruns;
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__le32 txMulticastTxOverflows;
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__le32 txFiltered;
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__le32 rxPacketsGood;
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__le64 rxBytesGood;
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__le32 rxFifoOverruns;
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__le32 BadSSD;
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__le32 rxCrcErrors;
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__le32 rxOversized;
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__le32 rxBroadcast;
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__le32 rxMulticast;
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__le32 rxOverflow;
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__le32 rxFiltered;
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__le32 linkStatus;
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#define TYPHOON_LINK_STAT_MASK __constant_cpu_to_le32(0x00000001)
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#define TYPHOON_LINK_GOOD __constant_cpu_to_le32(0x00000001)
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#define TYPHOON_LINK_BAD __constant_cpu_to_le32(0x00000000)
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@ -420,8 +420,8 @@ struct stats_resp {
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#define TYPHOON_LINK_DUPLEX_MASK __constant_cpu_to_le32(0x00000004)
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#define TYPHOON_LINK_FULL_DUPLEX __constant_cpu_to_le32(0x00000004)
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#define TYPHOON_LINK_HALF_DUPLEX __constant_cpu_to_le32(0x00000000)
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u32 unused2;
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u32 unused3;
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__le32 unused2;
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__le32 unused3;
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} __attribute__ ((packed));
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/* TYPHOON_CMD_XCVR_SELECT xcvr values (resp.parm1)
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@ -509,17 +509,17 @@ struct sa_descriptor {
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*/
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struct typhoon_file_header {
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u8 tag[8];
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u32 version;
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u32 numSections;
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u32 startAddr;
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u32 hmacDigest[5];
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__le32 version;
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__le32 numSections;
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__le32 startAddr;
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__le32 hmacDigest[5];
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} __attribute__ ((packed));
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struct typhoon_section_header {
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u32 len;
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__le32 len;
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u16 checksum;
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u16 reserved;
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u32 startAddr;
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__le32 startAddr;
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} __attribute__ ((packed));
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/* The Typhoon Register offsets
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