omap1: Use asm_irq_flags for entry-macro.S
Initialize asm_irq_flags in omap_init_irq and use it in get_irqnr_and_base to detect between omap7xx and omap15xx/16xx. Note that both INT_1510_IH2_IRQ and INT_1510_IH2_IRQ are defined as 0, so use INT_1510_IH2_IRQ for both of them. Tested-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@@ -14,18 +14,17 @@
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#include <mach/irqs.h>
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#include <mach/irqs.h>
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#include <asm/hardware/gic.h>
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#include <asm/hardware/gic.h>
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#if (defined(CONFIG_ARCH_OMAP730)||defined(CONFIG_ARCH_OMAP850)) && \
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/*
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(defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX))
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* We use __glue to avoid errors with multiple definitions of
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#error "FIXME: OMAP7XX doesn't support multiple-OMAP"
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* .globl omap_irq_flags as it's included from entry-armv.S but not
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#elif defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
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* from entry-common.S.
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#define INT_IH2_IRQ INT_7XX_IH2_IRQ
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*/
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#elif defined(CONFIG_ARCH_OMAP15XX)
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#ifdef __glue
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#define INT_IH2_IRQ INT_1510_IH2_IRQ
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.pushsection .data
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#elif defined(CONFIG_ARCH_OMAP16XX)
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.globl omap_irq_flags
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#define INT_IH2_IRQ INT_1610_IH2_IRQ
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omap_irq_flags:
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#else
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.word 0
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#warning "IH2 IRQ defaulted"
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.popsection
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#define INT_IH2_IRQ INT_1510_IH2_IRQ
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#endif
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#endif
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.macro disable_fiq
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.macro disable_fiq
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@@ -47,9 +46,11 @@
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beq 1510f
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beq 1510f
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ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET]
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ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET]
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ldr \tmp, =omap_irq_flags @ irq flags address
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ldr \tmp, [\tmp, #0] @ irq flags value
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cmp \irqnr, #0
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cmp \irqnr, #0
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ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
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ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
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cmpeq \irqnr, #INT_IH2_IRQ
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cmpeq \irqnr, \tmp
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ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)
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ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)
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ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
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ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
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addeqs \irqnr, \irqnr, #32
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addeqs \irqnr, \irqnr, #32
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@@ -176,26 +176,31 @@ static struct irq_chip omap_irq_chip = {
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void __init omap_init_irq(void)
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void __init omap_init_irq(void)
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{
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{
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extern unsigned int omap_irq_flags;
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int i, j;
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int i, j;
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#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
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#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
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if (cpu_is_omap7xx()) {
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if (cpu_is_omap7xx()) {
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omap_irq_flags = INT_7XX_IH2_IRQ;
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irq_banks = omap7xx_irq_banks;
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irq_banks = omap7xx_irq_banks;
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irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks);
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irq_bank_count = ARRAY_SIZE(omap7xx_irq_banks);
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}
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}
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#endif
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#endif
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#ifdef CONFIG_ARCH_OMAP15XX
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#ifdef CONFIG_ARCH_OMAP15XX
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if (cpu_is_omap1510()) {
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if (cpu_is_omap1510()) {
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omap_irq_flags = INT_1510_IH2_IRQ;
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irq_banks = omap1510_irq_banks;
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irq_banks = omap1510_irq_banks;
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irq_bank_count = ARRAY_SIZE(omap1510_irq_banks);
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irq_bank_count = ARRAY_SIZE(omap1510_irq_banks);
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}
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}
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if (cpu_is_omap310()) {
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if (cpu_is_omap310()) {
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omap_irq_flags = INT_1510_IH2_IRQ;
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irq_banks = omap310_irq_banks;
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irq_banks = omap310_irq_banks;
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irq_bank_count = ARRAY_SIZE(omap310_irq_banks);
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irq_bank_count = ARRAY_SIZE(omap310_irq_banks);
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}
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}
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#endif
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#endif
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#if defined(CONFIG_ARCH_OMAP16XX)
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#if defined(CONFIG_ARCH_OMAP16XX)
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if (cpu_is_omap16xx()) {
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if (cpu_is_omap16xx()) {
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omap_irq_flags = INT_1510_IH2_IRQ;
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irq_banks = omap1610_irq_banks;
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irq_banks = omap1610_irq_banks;
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irq_bank_count = ARRAY_SIZE(omap1610_irq_banks);
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irq_bank_count = ARRAY_SIZE(omap1610_irq_banks);
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}
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}
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@@ -77,7 +77,7 @@
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/*
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/*
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* OMAP-1610 specific IRQ numbers for interrupt handler 1
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* OMAP-1610 specific IRQ numbers for interrupt handler 1
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*/
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*/
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#define INT_1610_IH2_IRQ 0
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#define INT_1610_IH2_IRQ INT_1510_IH2_IRQ
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#define INT_1610_IH2_FIQ 2
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#define INT_1610_IH2_FIQ 2
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#define INT_1610_McBSP2_TX 4
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#define INT_1610_McBSP2_TX 4
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#define INT_1610_McBSP2_RX 5
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#define INT_1610_McBSP2_RX 5
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