OMAP2/3: UART: add omap_hwmod data for UARTs 1-4
This patch adds omap_hwmod data for UARTs on OMAP2 and OMAP3 platforms. UART4 support for 3630 and OMAP2 hwmod data added by Govindraj R. Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
This commit is contained in:
@@ -15,6 +15,7 @@
|
||||
#include <mach/irqs.h>
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/dma.h>
|
||||
#include <plat/serial.h>
|
||||
|
||||
#include "omap_hwmod_common_data.h"
|
||||
|
||||
@@ -71,6 +72,9 @@ static struct omap_hwmod omap2420_l3_main_hwmod = {
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap2420_l4_wkup_hwmod;
|
||||
static struct omap_hwmod omap2420_uart1_hwmod;
|
||||
static struct omap_hwmod omap2420_uart2_hwmod;
|
||||
static struct omap_hwmod omap2420_uart3_hwmod;
|
||||
|
||||
/* L4_CORE -> L4_WKUP interface */
|
||||
static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
|
||||
@@ -79,6 +83,60 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* L4 CORE -> UART1 interface */
|
||||
static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = {
|
||||
{
|
||||
.pa_start = OMAP2_UART1_BASE,
|
||||
.pa_end = OMAP2_UART1_BASE + SZ_8K - 1,
|
||||
.flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
|
||||
},
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
|
||||
.master = &omap2420_l4_core_hwmod,
|
||||
.slave = &omap2420_uart1_hwmod,
|
||||
.clk = "uart1_ick",
|
||||
.addr = omap2420_uart1_addr_space,
|
||||
.addr_cnt = ARRAY_SIZE(omap2420_uart1_addr_space),
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* L4 CORE -> UART2 interface */
|
||||
static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = {
|
||||
{
|
||||
.pa_start = OMAP2_UART2_BASE,
|
||||
.pa_end = OMAP2_UART2_BASE + SZ_1K - 1,
|
||||
.flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
|
||||
},
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
|
||||
.master = &omap2420_l4_core_hwmod,
|
||||
.slave = &omap2420_uart2_hwmod,
|
||||
.clk = "uart2_ick",
|
||||
.addr = omap2420_uart2_addr_space,
|
||||
.addr_cnt = ARRAY_SIZE(omap2420_uart2_addr_space),
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* L4 PER -> UART3 interface */
|
||||
static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = {
|
||||
{
|
||||
.pa_start = OMAP2_UART3_BASE,
|
||||
.pa_end = OMAP2_UART3_BASE + SZ_1K - 1,
|
||||
.flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
|
||||
},
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
|
||||
.master = &omap2420_l4_core_hwmod,
|
||||
.slave = &omap2420_uart3_hwmod,
|
||||
.clk = "uart3_ick",
|
||||
.addr = omap2420_uart3_addr_space,
|
||||
.addr_cnt = ARRAY_SIZE(omap2420_uart3_addr_space),
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* Slave interfaces on the L4_CORE interconnect */
|
||||
static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
|
||||
&omap2420_l3_main__l4_core,
|
||||
@@ -87,6 +145,9 @@ static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
|
||||
/* Master interfaces on the L4_CORE interconnect */
|
||||
static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
|
||||
&omap2420_l4_core__l4_wkup,
|
||||
&omap2_l4_core__uart1,
|
||||
&omap2_l4_core__uart2,
|
||||
&omap2_l4_core__uart3,
|
||||
};
|
||||
|
||||
/* L4 CORE */
|
||||
@@ -165,12 +226,144 @@ static struct omap_hwmod omap2420_iva_hwmod = {
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
|
||||
};
|
||||
|
||||
/* UART */
|
||||
|
||||
static struct omap_hwmod_class_sysconfig uart_sysc = {
|
||||
.rev_offs = 0x50,
|
||||
.sysc_offs = 0x54,
|
||||
.syss_offs = 0x58,
|
||||
.sysc_flags = (SYSC_HAS_SIDLEMODE |
|
||||
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
|
||||
SYSC_HAS_AUTOIDLE),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class uart_class = {
|
||||
.name = "uart",
|
||||
.sysc = &uart_sysc,
|
||||
};
|
||||
|
||||
/* UART1 */
|
||||
|
||||
static struct omap_hwmod_irq_info uart1_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART1_IRQ, },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info uart1_sdma_reqs[] = {
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = {
|
||||
&omap2_l4_core__uart1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap2420_uart1_hwmod = {
|
||||
.name = "uart1",
|
||||
.mpu_irqs = uart1_mpu_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs),
|
||||
.sdma_reqs = uart1_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs),
|
||||
.main_clk = "uart1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
.prcm_reg_id = 1,
|
||||
.module_bit = OMAP24XX_EN_UART1_SHIFT,
|
||||
.idlest_reg_id = 1,
|
||||
.idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT,
|
||||
},
|
||||
},
|
||||
.slaves = omap2420_uart1_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves),
|
||||
.class = &uart_class,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
|
||||
};
|
||||
|
||||
/* UART2 */
|
||||
|
||||
static struct omap_hwmod_irq_info uart2_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART2_IRQ, },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info uart2_sdma_reqs[] = {
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = {
|
||||
&omap2_l4_core__uart2,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap2420_uart2_hwmod = {
|
||||
.name = "uart2",
|
||||
.mpu_irqs = uart2_mpu_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs),
|
||||
.sdma_reqs = uart2_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs),
|
||||
.main_clk = "uart2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
.prcm_reg_id = 1,
|
||||
.module_bit = OMAP24XX_EN_UART2_SHIFT,
|
||||
.idlest_reg_id = 1,
|
||||
.idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT,
|
||||
},
|
||||
},
|
||||
.slaves = omap2420_uart2_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves),
|
||||
.class = &uart_class,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
|
||||
};
|
||||
|
||||
/* UART3 */
|
||||
|
||||
static struct omap_hwmod_irq_info uart3_mpu_irqs[] = {
|
||||
{ .irq = INT_24XX_UART3_IRQ, },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info uart3_sdma_reqs[] = {
|
||||
{ .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
|
||||
{ .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = {
|
||||
&omap2_l4_core__uart3,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap2420_uart3_hwmod = {
|
||||
.name = "uart3",
|
||||
.mpu_irqs = uart3_mpu_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs),
|
||||
.sdma_reqs = uart3_sdma_reqs,
|
||||
.sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs),
|
||||
.main_clk = "uart3_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
.prcm_reg_id = 2,
|
||||
.module_bit = OMAP24XX_EN_UART3_SHIFT,
|
||||
.idlest_reg_id = 2,
|
||||
.idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT,
|
||||
},
|
||||
},
|
||||
.slaves = omap2420_uart3_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves),
|
||||
.class = &uart_class,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
|
||||
};
|
||||
|
||||
static __initdata struct omap_hwmod *omap2420_hwmods[] = {
|
||||
&omap2420_l3_main_hwmod,
|
||||
&omap2420_l4_core_hwmod,
|
||||
&omap2420_l4_wkup_hwmod,
|
||||
&omap2420_mpu_hwmod,
|
||||
&omap2420_iva_hwmod,
|
||||
&omap2420_uart1_hwmod,
|
||||
&omap2420_uart2_hwmod,
|
||||
&omap2420_uart3_hwmod,
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
Reference in New Issue
Block a user