ARM: EXYNOS: Add platform resource definitions for FIMC-LITE
Add the gate clocks and register region address definition for FIMC-LITE devices available in EXYNOS4X12 SoCs. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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committed by
Kukjin Kim
parent
ad28536a89
commit
06050e5580
@@ -92,6 +92,16 @@ static struct clk init_clocks_off[] = {
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.devname = SYSMMU_CLOCK_DEVNAME(isp, 9),
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.devname = SYSMMU_CLOCK_DEVNAME(isp, 9),
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.enable = exynos4212_clk_ip_isp1_ctrl,
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.enable = exynos4212_clk_ip_isp1_ctrl,
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.ctrlbit = (1 << 4),
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.ctrlbit = (1 << 4),
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}, {
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.name = "flite",
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.devname = "exynos-fimc-lite.0",
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.enable = exynos4212_clk_ip_isp0_ctrl,
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.ctrlbit = (1 << 4),
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}, {
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.name = "flite",
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.devname = "exynos-fimc-lite.1",
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.enable = exynos4212_clk_ip_isp0_ctrl,
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.ctrlbit = (1 << 3),
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}
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}
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};
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};
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@@ -34,6 +34,9 @@
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#define EXYNOS4_PA_JPEG 0x11840000
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#define EXYNOS4_PA_JPEG 0x11840000
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/* x = 0...1 */
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#define EXYNOS4_PA_FIMC_LITE(x) (0x12390000 + ((x) * 0x10000))
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#define EXYNOS4_PA_G2D 0x12800000
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#define EXYNOS4_PA_G2D 0x12800000
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#define EXYNOS4_PA_I2S0 0x03830000
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#define EXYNOS4_PA_I2S0 0x03830000
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