Merge branch 'i2c-for-linus' of git://jdelvare.pck.nerim.net/jdelvare-2.6
* 'i2c-for-linus' of git://jdelvare.pck.nerim.net/jdelvare-2.6: i2c-core: Some style cleanups i2c-piix4: Add support for the Broadcom HT1100 chipset i2c-piix4: Add support to SB800 SMBus changes i2c-pca-platform: Use defaults if no platform_data given i2c-algo-pca: Use timeout for checking the state machine i2c-algo-pca: Rework waiting for a free bus i2c-algo-pca: Add PCA9665 support i2c: Adapt debug macros for KERN_* constants i2c-davinci: Fix timeout handling i2c: Adapter timeout is in jiffies i2c: Set a default timeout value for all adapters i2c: Add missing KERN_* constants to printks i2c-algo-pcf: Handle timeout correctly i2c-algo-pcf: Style cleanups eeprom/at24: Remove EXPERIMENTAL i2c-nforce2: Add support for MCP67, MCP73, MCP78S and MCP79 i2c: Clarify which clients are auto-removed i2c: Let checkpatch shout on users of the legacy model i2c: Document the different ways to instantiate i2c devices
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@ -1,7 +1,14 @@
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#ifndef _LINUX_I2C_ALGO_PCA_H
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#define _LINUX_I2C_ALGO_PCA_H
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/* Clock speeds for the bus */
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/* Chips known to the pca algo */
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#define I2C_PCA_CHIP_9564 0x00
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#define I2C_PCA_CHIP_9665 0x01
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/* Internal period for PCA9665 oscilator */
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#define I2C_PCA_OSC_PER 3 /* e10-8s */
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/* Clock speeds for the bus for PCA9564*/
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#define I2C_PCA_CON_330kHz 0x00
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#define I2C_PCA_CON_288kHz 0x01
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#define I2C_PCA_CON_217kHz 0x02
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@ -18,6 +25,26 @@
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#define I2C_PCA_ADR 0x02 /* OWN ADR Read/Write */
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#define I2C_PCA_CON 0x03 /* CONTROL Read/Write */
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/* PCA9665 registers */
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#define I2C_PCA_INDPTR 0x00 /* INDIRECT Pointer Write Only */
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#define I2C_PCA_IND 0x02 /* INDIRECT Read/Write */
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/* PCA9665 indirect registers */
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#define I2C_PCA_ICOUNT 0x00 /* Byte Count for buffered mode */
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#define I2C_PCA_IADR 0x01 /* OWN ADR */
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#define I2C_PCA_ISCLL 0x02 /* SCL LOW period */
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#define I2C_PCA_ISCLH 0x03 /* SCL HIGH period */
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#define I2C_PCA_ITO 0x04 /* TIMEOUT */
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#define I2C_PCA_IPRESET 0x05 /* Parallel bus reset */
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#define I2C_PCA_IMODE 0x06 /* I2C Bus mode */
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/* PCA9665 I2C bus mode */
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#define I2C_PCA_MODE_STD 0x00 /* Standard mode */
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#define I2C_PCA_MODE_FAST 0x01 /* Fast mode */
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#define I2C_PCA_MODE_FASTP 0x02 /* Fast Plus mode */
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#define I2C_PCA_MODE_TURBO 0x03 /* Turbo mode */
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#define I2C_PCA_CON_AA 0x80 /* Assert Acknowledge */
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#define I2C_PCA_CON_ENSIO 0x40 /* Enable */
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#define I2C_PCA_CON_STA 0x20 /* Start */
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@ -31,7 +58,9 @@ struct i2c_algo_pca_data {
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int (*read_byte) (void *data, int reg);
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int (*wait_for_completion) (void *data);
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void (*reset_chip) (void *data);
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/* i2c_clock values are defined in linux/i2c-algo-pca.h */
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/* For PCA9564, use one of the predefined frequencies:
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* 330000, 288000, 217000, 146000, 88000, 59000, 44000, 36000
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* For PCA9665, use the frequency you want here. */
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unsigned int i2c_clock;
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};
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@ -6,7 +6,7 @@ struct i2c_pca9564_pf_platform_data {
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* not supplied (negative value), but it
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* cannot exit some error conditions then */
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int i2c_clock_speed; /* values are defined in linux/i2c-algo-pca.h */
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int timeout; /* timeout = this value * 10us */
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int timeout; /* timeout in jiffies */
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};
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#endif /* I2C_PCA9564_PLATFORM_H */
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@ -1237,6 +1237,7 @@
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#define PCI_DEVICE_ID_NVIDIA_NVENET_21 0x0451
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#define PCI_DEVICE_ID_NVIDIA_NVENET_22 0x0452
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#define PCI_DEVICE_ID_NVIDIA_NVENET_23 0x0453
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS 0x0542
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#define PCI_DEVICE_ID_NVIDIA_NVENET_24 0x054C
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#define PCI_DEVICE_ID_NVIDIA_NVENET_25 0x054D
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#define PCI_DEVICE_ID_NVIDIA_NVENET_26 0x054E
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@ -1247,11 +1248,14 @@
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#define PCI_DEVICE_ID_NVIDIA_NVENET_31 0x07DF
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_IDE 0x0560
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_IDE 0x056C
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS 0x0752
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP77_IDE 0x0759
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#define PCI_DEVICE_ID_NVIDIA_NVENET_32 0x0760
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#define PCI_DEVICE_ID_NVIDIA_NVENET_33 0x0761
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#define PCI_DEVICE_ID_NVIDIA_NVENET_34 0x0762
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#define PCI_DEVICE_ID_NVIDIA_NVENET_35 0x0763
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS 0x07D8
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#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS 0x0AA2
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#define PCI_DEVICE_ID_NVIDIA_NVENET_36 0x0AB0
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#define PCI_DEVICE_ID_NVIDIA_NVENET_37 0x0AB1
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#define PCI_DEVICE_ID_NVIDIA_NVENET_38 0x0AB2
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@ -1475,6 +1479,7 @@
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#define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214
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#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217
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#define PCI_DEVICE_ID_SERVERWORKS_CSB6LPC 0x0227
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#define PCI_DEVICE_ID_SERVERWORKS_HT1100LD 0x0408
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#define PCI_VENDOR_ID_SBE 0x1176
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#define PCI_DEVICE_ID_SBE_WANXL100 0x0301
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