[ARM] mm: enable sparsemem on clps7500 and RiscPC
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King
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07f841b7c5
@@ -36,4 +36,12 @@
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#define FLUSH_BASE_PHYS 0x00000000
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#define FLUSH_BASE 0xdf000000
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/*
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* Sparsemem support. Each section is a maximum of 64MB. The sections
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* are offset by 128MB and can cover 128MB, so that gives us a maximum
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* of 29 physmem bits.
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*/
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#define MAX_PHYSMEM_BITS 29
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#define SECTION_SIZE_BITS 26
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#endif
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