PCI: make cardbus-bridge resources optional
Allocate resources to cardbus bridge only after all other genuine resources requests are satisfied. Dont retry if resource allocation for cardbus-bridges fail. Signed-off-by: Ram Pai <linuxram@us.ibm.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
@@ -283,6 +283,8 @@ static inline int pci_iov_bus_range(struct pci_bus *bus)
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#endif /* CONFIG_PCI_IOV */
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#endif /* CONFIG_PCI_IOV */
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extern unsigned long pci_cardbus_resource_alignment(struct resource *);
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static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
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static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
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struct resource *res)
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struct resource *res)
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{
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{
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@@ -292,6 +294,8 @@ static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
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if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
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if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
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return pci_sriov_resource_alignment(dev, resno);
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return pci_sriov_resource_alignment(dev, resno);
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#endif
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#endif
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if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS)
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return pci_cardbus_resource_alignment(res);
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return resource_alignment(res);
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return resource_alignment(res);
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}
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}
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@@ -164,6 +164,7 @@ static void adjust_resources_sorted(struct resource_list_x *add_head,
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idx = res - &list->dev->resource[0];
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idx = res - &list->dev->resource[0];
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add_size=list->add_size;
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add_size=list->add_size;
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if (!resource_size(res)) {
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if (!resource_size(res)) {
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res->start = list->start;
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res->end = res->start + add_size - 1;
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res->end = res->start + add_size - 1;
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if(pci_assign_resource(list->dev, idx))
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if(pci_assign_resource(list->dev, idx))
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reset_resource(res);
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reset_resource(res);
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@@ -223,7 +224,7 @@ static void __assign_resources_sorted(struct resource_list *head,
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/* Satisfy the must-have resource requests */
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/* Satisfy the must-have resource requests */
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assign_requested_resources_sorted(head, fail_head);
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assign_requested_resources_sorted(head, fail_head);
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/* Try to satisfy any additional nice-to-have resource
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/* Try to satisfy any additional optional resource
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requests */
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requests */
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if (add_head)
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if (add_head)
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adjust_resources_sorted(add_head, head);
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adjust_resources_sorted(add_head, head);
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@@ -678,7 +679,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
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if (add_head && i >= PCI_IOV_RESOURCES &&
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if (add_head && i >= PCI_IOV_RESOURCES &&
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i <= PCI_IOV_RESOURCE_END) {
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i <= PCI_IOV_RESOURCE_END) {
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r->end = r->start - 1;
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r->end = r->start - 1;
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add_to_list(add_head, dev, r, r_size, 1);
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add_to_list(add_head, dev, r, r_size, 0/* dont' care */);
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children_add_size += r_size;
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children_add_size += r_size;
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continue;
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continue;
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}
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}
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@@ -743,7 +744,17 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
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return 1;
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return 1;
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}
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}
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static void pci_bus_size_cardbus(struct pci_bus *bus)
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unsigned long pci_cardbus_resource_alignment(struct resource *res)
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{
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if (res->flags & IORESOURCE_IO)
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return pci_cardbus_io_size;
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if (res->flags & IORESOURCE_MEM)
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return pci_cardbus_mem_size;
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return 0;
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}
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static void pci_bus_size_cardbus(struct pci_bus *bus,
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struct resource_list_x *add_head)
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{
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{
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struct pci_dev *bridge = bus->self;
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struct pci_dev *bridge = bus->self;
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struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
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struct resource *b_res = &bridge->resource[PCI_BRIDGE_RESOURCES];
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@@ -754,12 +765,14 @@ static void pci_bus_size_cardbus(struct pci_bus *bus)
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* a fixed amount of bus space for CardBus bridges.
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* a fixed amount of bus space for CardBus bridges.
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*/
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*/
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b_res[0].start = 0;
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b_res[0].start = 0;
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b_res[0].end = pci_cardbus_io_size - 1;
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b_res[0].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN;
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b_res[0].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN;
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if (add_head)
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add_to_list(add_head, bridge, b_res, pci_cardbus_io_size, 0 /* dont care */);
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b_res[1].start = 0;
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b_res[1].start = 0;
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b_res[1].end = pci_cardbus_io_size - 1;
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b_res[1].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN;
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b_res[1].flags |= IORESOURCE_IO | IORESOURCE_SIZEALIGN;
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if (add_head)
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add_to_list(add_head, bridge, b_res+1, pci_cardbus_io_size, 0 /* dont care */);
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/*
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/*
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* Check whether prefetchable memory is supported
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* Check whether prefetchable memory is supported
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@@ -779,17 +792,27 @@ static void pci_bus_size_cardbus(struct pci_bus *bus)
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*/
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*/
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if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
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if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM0) {
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b_res[2].start = 0;
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b_res[2].start = 0;
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b_res[2].end = pci_cardbus_mem_size - 1;
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b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_SIZEALIGN;
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b_res[2].flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH | IORESOURCE_SIZEALIGN;
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if (add_head)
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add_to_list(add_head, bridge, b_res+2, pci_cardbus_mem_size, 0 /* dont care */);
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b_res[3].start = 0;
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b_res[3].start = 0;
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b_res[3].end = pci_cardbus_mem_size - 1;
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b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN;
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b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN;
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if (add_head)
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add_to_list(add_head, bridge, b_res+3, pci_cardbus_mem_size, 0 /* dont care */);
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} else {
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} else {
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b_res[3].start = 0;
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b_res[3].start = 0;
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b_res[3].end = pci_cardbus_mem_size * 2 - 1;
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b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN;
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b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_SIZEALIGN;
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if (add_head)
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add_to_list(add_head, bridge, b_res+3, pci_cardbus_mem_size * 2, 0 /* dont care */);
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}
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}
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/* set the size of the resource to zero, so that the resource does not
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* get assigned during required-resource allocation cycle but gets assigned
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* during the optional-resource allocation cycle.
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*/
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b_res[0].start = b_res[1].start = b_res[2].start = b_res[3].start = 1;
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b_res[0].end = b_res[1].end = b_res[2].end = b_res[3].end = 0;
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}
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}
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void __ref __pci_bus_size_bridges(struct pci_bus *bus,
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void __ref __pci_bus_size_bridges(struct pci_bus *bus,
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@@ -806,7 +829,7 @@ void __ref __pci_bus_size_bridges(struct pci_bus *bus,
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switch (dev->class >> 8) {
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switch (dev->class >> 8) {
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case PCI_CLASS_BRIDGE_CARDBUS:
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case PCI_CLASS_BRIDGE_CARDBUS:
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pci_bus_size_cardbus(b);
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pci_bus_size_cardbus(b, add_head);
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break;
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break;
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case PCI_CLASS_BRIDGE_PCI:
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case PCI_CLASS_BRIDGE_PCI:
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