Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (62 commits) powerpc/85xx: Fix signedness bug in cache-sram powerpc/fsl: 85xx: document cache sram bindings powerpc/fsl: define binding for fsl mpic interrupt controllers powerpc/fsl_msi: Handle msi-available-ranges better drivers/serial/ucc_uart.c: Add of_node_put to avoid memory leak powerpc/85xx: Fix SPE float to integer conversion failure powerpc/85xx: Update sata controller compatible for p1022ds board ATA: Add FSL sata v2 controller support powerpc/mpc8xxx_gpio: simplify searching for 'fsl, qoriq-gpio' compatiable powerpc/8xx: remove obsolete mgsuvd board powerpc/82xx: rename and update mgcoge board support powerpc/83xx: rename and update kmeter1 powerpc/85xx: Workaroudn e500 CPU erratum A005 powerpc/fsl_pci: Add support for FSL PCIe controllers v2.x powerpc/85xx: Fix writing to spin table 'cpu-release-addr' on ppc64e powerpc/pseries: Disable MSI using new interface if possible powerpc: Enable GENERIC_HARDIRQS_NO_DEPRECATED. powerpc: core irq_data conversion. powerpc: sysdev/xilinx_intc irq_data conversion. powerpc: sysdev/uic irq_data conversion. ... Fix up conflicts in arch/powerpc/sysdev/fsl_msi.c (due to getting rid of of_platform_driver in arch/powerpc)
This commit is contained in:
@@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2007-2010 Freescale Semiconductor, Inc.
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* Copyright (C) 2007-2011 Freescale Semiconductor, Inc.
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*
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* Author: Tony Li <tony.li@freescale.com>
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* Jason Jin <Jason.jin@freescale.com>
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@@ -47,14 +47,14 @@ static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
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* We do not need this actually. The MSIR register has been read once
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* in the cascade interrupt. So, this MSI interrupt has been acked
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*/
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static void fsl_msi_end_irq(unsigned int virq)
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static void fsl_msi_end_irq(struct irq_data *d)
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{
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}
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static struct irq_chip fsl_msi_chip = {
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.irq_mask = mask_msi_irq,
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.irq_unmask = unmask_msi_irq,
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.ack = fsl_msi_end_irq,
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.irq_ack = fsl_msi_end_irq,
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.name = "FSL-MSI",
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};
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@@ -183,6 +183,7 @@ out_free:
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static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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{
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struct irq_chip *chip = get_irq_desc_chip(desc);
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unsigned int cascade_irq;
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struct fsl_msi *msi_data;
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int msir_index = -1;
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@@ -196,11 +197,11 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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raw_spin_lock(&desc->lock);
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if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
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if (desc->chip->mask_ack)
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desc->chip->mask_ack(irq);
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if (chip->irq_mask_ack)
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chip->irq_mask_ack(&desc->irq_data);
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else {
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desc->chip->mask(irq);
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desc->chip->ack(irq);
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chip->irq_mask(&desc->irq_data);
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chip->irq_ack(&desc->irq_data);
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}
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}
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@@ -238,11 +239,11 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
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switch (msi_data->feature & FSL_PIC_IP_MASK) {
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case FSL_PIC_IP_MPIC:
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desc->chip->eoi(irq);
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chip->irq_eoi(&desc->irq_data);
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break;
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case FSL_PIC_IP_IPIC:
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if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
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desc->chip->unmask(irq);
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if (!(desc->status & IRQ_DISABLED) && chip->irq_unmask)
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chip->irq_unmask(&desc->irq_data);
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break;
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}
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unlock:
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@@ -273,18 +274,46 @@ static int fsl_of_msi_remove(struct platform_device *ofdev)
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return 0;
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}
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static int __devinit fsl_msi_setup_hwirq(struct fsl_msi *msi,
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struct platform_device *dev,
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int offset, int irq_index)
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{
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struct fsl_msi_cascade_data *cascade_data = NULL;
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int virt_msir;
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virt_msir = irq_of_parse_and_map(dev->dev.of_node, irq_index);
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if (virt_msir == NO_IRQ) {
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dev_err(&dev->dev, "%s: Cannot translate IRQ index %d\n",
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__func__, irq_index);
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return 0;
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}
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cascade_data = kzalloc(sizeof(struct fsl_msi_cascade_data), GFP_KERNEL);
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if (!cascade_data) {
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dev_err(&dev->dev, "No memory for MSI cascade data\n");
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return -ENOMEM;
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}
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msi->msi_virqs[irq_index] = virt_msir;
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cascade_data->index = offset + irq_index;
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cascade_data->msi_data = msi;
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set_irq_data(virt_msir, cascade_data);
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set_irq_chained_handler(virt_msir, fsl_msi_cascade);
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return 0;
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}
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static int __devinit fsl_of_msi_probe(struct platform_device *dev)
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{
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struct fsl_msi *msi;
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struct resource res;
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int err, i, count;
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int err, i, j, irq_index, count;
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int rc;
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int virt_msir;
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const u32 *p;
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struct fsl_msi_feature *features;
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struct fsl_msi_cascade_data *cascade_data = NULL;
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int len;
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u32 offset;
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static const u32 all_avail[] = { 0, NR_MSI_IRQS };
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if (!dev->dev.of_match)
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return -EINVAL;
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@@ -335,42 +364,34 @@ static int __devinit fsl_of_msi_probe(struct platform_device *dev)
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goto error_out;
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}
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p = of_get_property(dev->dev.of_node, "interrupts", &count);
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if (!p) {
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dev_err(&dev->dev, "no interrupts property found on %s\n",
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dev->dev.of_node->full_name);
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err = -ENODEV;
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goto error_out;
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}
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if (count % 8 != 0) {
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dev_err(&dev->dev, "Malformed interrupts property on %s\n",
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dev->dev.of_node->full_name);
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p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len);
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if (p && len % (2 * sizeof(u32)) != 0) {
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dev_err(&dev->dev, "%s: Malformed msi-available-ranges property\n",
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__func__);
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err = -EINVAL;
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goto error_out;
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}
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offset = 0;
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p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len);
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if (p)
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offset = *p / IRQS_PER_MSI_REG;
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count /= sizeof(u32);
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for (i = 0; i < min(count / 2, NR_MSI_REG); i++) {
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virt_msir = irq_of_parse_and_map(dev->dev.of_node, i);
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if (virt_msir != NO_IRQ) {
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cascade_data = kzalloc(
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sizeof(struct fsl_msi_cascade_data),
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GFP_KERNEL);
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if (!cascade_data) {
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dev_err(&dev->dev,
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"No memory for MSI cascade data\n");
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err = -ENOMEM;
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if (!p)
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p = all_avail;
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for (irq_index = 0, i = 0; i < len / (2 * sizeof(u32)); i++) {
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if (p[i * 2] % IRQS_PER_MSI_REG ||
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p[i * 2 + 1] % IRQS_PER_MSI_REG) {
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printk(KERN_WARNING "%s: %s: msi available range of %u at %u is not IRQ-aligned\n",
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__func__, dev->dev.of_node->full_name,
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p[i * 2 + 1], p[i * 2]);
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err = -EINVAL;
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goto error_out;
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}
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offset = p[i * 2] / IRQS_PER_MSI_REG;
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count = p[i * 2 + 1] / IRQS_PER_MSI_REG;
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for (j = 0; j < count; j++, irq_index++) {
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err = fsl_msi_setup_hwirq(msi, dev, offset, irq_index);
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if (err)
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goto error_out;
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}
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msi->msi_virqs[i] = virt_msir;
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cascade_data->index = i + offset;
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cascade_data->msi_data = msi;
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set_irq_data(virt_msir, (void *)cascade_data);
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set_irq_chained_handler(virt_msir, fsl_msi_cascade);
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}
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}
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