ath5k: don't mask off interrupt bits
Since interrupts are already masked by the hardware, there's no need to discard interrupt bits in the ISR itself. Also, in ath5k_beacon_config we mask off a couple of bits without locking, so doing this mask in software can lead to unhandled beacon timer and beacon miss interrupts. Changes-licensed-under: 3-Clause-BSD Signed-off-by: Bob Copeland <me@bobcopeland.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
committed by
John W. Linville
parent
144d9ad98e
commit
0b6f582bd3
@@ -2408,16 +2408,9 @@ ath5k_intr(int irq, void *dev_id)
|
|||||||
return IRQ_NONE;
|
return IRQ_NONE;
|
||||||
|
|
||||||
do {
|
do {
|
||||||
/*
|
|
||||||
* Figure out the reason(s) for the interrupt. Note
|
|
||||||
* that get_isr returns a pseudo-ISR that may include
|
|
||||||
* bits we haven't explicitly enabled so we mask the
|
|
||||||
* value to insure we only process bits we requested.
|
|
||||||
*/
|
|
||||||
ath5k_hw_get_isr(ah, &status); /* NB: clears IRQ too */
|
ath5k_hw_get_isr(ah, &status); /* NB: clears IRQ too */
|
||||||
ATH5K_DBG(sc, ATH5K_DEBUG_INTR, "status 0x%x/0x%x\n",
|
ATH5K_DBG(sc, ATH5K_DEBUG_INTR, "status 0x%x/0x%x\n",
|
||||||
status, sc->imask);
|
status, sc->imask);
|
||||||
status &= sc->imask; /* discard unasked for bits */
|
|
||||||
if (unlikely(status & AR5K_INT_FATAL)) {
|
if (unlikely(status & AR5K_INT_FATAL)) {
|
||||||
/*
|
/*
|
||||||
* Fatal errors are unrecoverable.
|
* Fatal errors are unrecoverable.
|
||||||
|
Reference in New Issue
Block a user