[ARM] cputype: separate definitions, use them
Add asm/cputype.h, moving functions and definitions from asm/system.h there. Convert all users of 'processor_id' to the more efficient read_cpuid_id() function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King
parent
b8e6c91c74
commit
0ba8b9b273
@@ -26,6 +26,7 @@
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#include <linux/fs.h>
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#include <asm/cpu.h>
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#include <asm/cputype.h>
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#include <asm/elf.h>
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#include <asm/procinfo.h>
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#include <asm/setup.h>
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@@ -280,9 +281,9 @@ static inline void dump_cache(const char *prefix, int cpu, unsigned int cache)
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static void __init dump_cpu_info(int cpu)
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{
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unsigned int info = read_cpuid(CPUID_CACHETYPE);
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unsigned int info = read_cpuid_cachetype();
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if (info != processor_id) {
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if (info != read_cpuid_id()) {
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printk("CPU%u: D %s %s cache\n", cpu, cache_is_vivt() ? "VIVT" : "VIPT",
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cache_types[CACHE_TYPE(info)]);
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if (CACHE_S(info)) {
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@@ -301,15 +302,15 @@ int cpu_architecture(void)
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{
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int cpu_arch;
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if ((processor_id & 0x0008f000) == 0) {
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if ((read_cpuid_id() & 0x0008f000) == 0) {
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cpu_arch = CPU_ARCH_UNKNOWN;
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} else if ((processor_id & 0x0008f000) == 0x00007000) {
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cpu_arch = (processor_id & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
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} else if ((processor_id & 0x00080000) == 0x00000000) {
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cpu_arch = (processor_id >> 16) & 7;
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} else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
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cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
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} else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
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cpu_arch = (read_cpuid_id() >> 16) & 7;
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if (cpu_arch)
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cpu_arch += CPU_ARCH_ARMv3;
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} else if ((processor_id & 0x000f0000) == 0x000f0000) {
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} else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
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unsigned int mmfr0;
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/* Revised CPUID format. Read the Memory Model Feature
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@@ -346,10 +347,10 @@ static void __init setup_processor(void)
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* types. The linker builds this table for us from the
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* entries in arch/arm/mm/proc-*.S
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*/
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list = lookup_processor_type(processor_id);
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list = lookup_processor_type(read_cpuid_id());
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if (!list) {
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printk("CPU configuration botched (ID %08x), unable "
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"to continue.\n", processor_id);
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"to continue.\n", read_cpuid_id());
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while (1);
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}
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@@ -369,7 +370,7 @@ static void __init setup_processor(void)
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#endif
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printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
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cpu_name, processor_id, (int)processor_id & 15,
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cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
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proc_arch[cpu_architecture()], cr_alignment);
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sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
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@@ -922,7 +923,7 @@ static int c_show(struct seq_file *m, void *v)
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int i;
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seq_printf(m, "Processor\t: %s rev %d (%s)\n",
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cpu_name, (int)processor_id & 15, elf_platform);
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cpu_name, read_cpuid_id() & 15, elf_platform);
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#if defined(CONFIG_SMP)
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for_each_online_cpu(i) {
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@@ -949,30 +950,30 @@ static int c_show(struct seq_file *m, void *v)
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if (elf_hwcap & (1 << i))
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seq_printf(m, "%s ", hwcap_str[i]);
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seq_printf(m, "\nCPU implementer\t: 0x%02x\n", processor_id >> 24);
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seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
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seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
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if ((processor_id & 0x0008f000) == 0x00000000) {
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if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
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/* pre-ARM7 */
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seq_printf(m, "CPU part\t: %07x\n", processor_id >> 4);
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seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
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} else {
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if ((processor_id & 0x0008f000) == 0x00007000) {
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if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
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/* ARM7 */
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seq_printf(m, "CPU variant\t: 0x%02x\n",
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(processor_id >> 16) & 127);
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(read_cpuid_id() >> 16) & 127);
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} else {
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/* post-ARM7 */
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seq_printf(m, "CPU variant\t: 0x%x\n",
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(processor_id >> 20) & 15);
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(read_cpuid_id() >> 20) & 15);
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}
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seq_printf(m, "CPU part\t: 0x%03x\n",
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(processor_id >> 4) & 0xfff);
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(read_cpuid_id() >> 4) & 0xfff);
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}
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seq_printf(m, "CPU revision\t: %d\n", processor_id & 15);
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seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
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{
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unsigned int cache_info = read_cpuid(CPUID_CACHETYPE);
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if (cache_info != processor_id) {
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unsigned int cache_info = read_cpuid_cachetype();
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if (cache_info != read_cpuid_id()) {
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seq_printf(m, "Cache type\t: %s\n"
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"Cache clean\t: %s\n"
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"Cache lockdown\t: %s\n"
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