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powerpc: add fsl,fifo-depth property to Freescale SSI device nodes

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The Freescale Serial Synchronous Interface (SSI) is an audio device present on
some Freescale SOCs.  Various implementations of the SSI have a different
transmit and receive FIFO depth, but are otherwise identical.  To support
these variations, add a new property fsl,fifo-depth to the SSI node that
specifies the depth of the FIFOs.

Also update the MPC8610 HPCD device tree with this property.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
Timur Tabi
2009-03-04 14:55:30 -06:00
committed by Kumar Gala
parent c3071951d0
commit 0bcd783c1f
2 changed files with 4 additions and 0 deletions
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Documentation/powerpc/dts-bindings/fsl/ssi.txt
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@@ -30,6 +30,8 @@ Required properties:
- fsl,capture-dma: phandle to a node for the DMA channel to use for
capture (recording) of audio. This is typically dictated
by SOC design. See the notes below.
- fsl,fifo-depth: the number of elements in the transmit and receive FIFOs.
This number is the maximum allowed value for SFCSR[TFWM0].
Optional properties:
- codec-handle : phandle to a 'codec' node that defines an audio