MIPS: Netlogic: Move code common with XLP to common/
- Move code that can be shared with XLP (irq.c, smp.c, time.c and xlr_console.c) to arch/mips/netlogic/common - Add asm/netlogic/haldefs.h and asm/netlogic/common.h for common and io functions shared with XLP - remove type 'nlm_reg_t *' and use uint64_t for mmio offsets - Move XLR specific code in smp.c to xlr/wakeup.c - Move XLR specific PCI code from irq.c to mips/pci/pci-xlr.c - Provide API for pic functions called from common/irq.c Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2964/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Jayachandran C
committed by
Ralf Baechle
Ralf Baechle
parent
99fb2f7984
commit
0c9654072a
3
arch/mips/netlogic/common/Makefile
Normal file
3
arch/mips/netlogic/common/Makefile
Normal file
@ -0,0 +1,3 @@
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obj-y += irq.o time.o
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obj-$(CONFIG_SMP) += smp.o
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obj-$(CONFIG_EARLY_PRINTK) += earlycons.o
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51
arch/mips/netlogic/common/earlycons.c
Normal file
51
arch/mips/netlogic/common/earlycons.c
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@ -0,0 +1,51 @@
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/*
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* Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
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* reserved.
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*
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* This software is available to you under a choice of one of two
|
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* licenses. You may choose to be licensed under the terms of the GNU
|
||||
* General Public License (GPL) Version 2, available from the file
|
||||
* COPYING in the main directory of this source tree, or the NetLogic
|
||||
* license below:
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
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*
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||||
* THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
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||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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||||
* ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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||||
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/types.h>
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#include <linux/serial_reg.h>
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#include <asm/mipsregs.h>
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#include <asm/netlogic/haldefs.h>
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#include <asm/netlogic/xlr/iomap.h>
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void prom_putchar(char c)
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{
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uint64_t uartbase;
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uartbase = nlm_mmio_base(NETLOGIC_IO_UART_0_OFFSET);
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while (nlm_read_reg(uartbase, UART_LSR) == 0)
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;
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nlm_write_reg(uartbase, UART_TX, c);
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}
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230
arch/mips/netlogic/common/irq.c
Normal file
230
arch/mips/netlogic/common/irq.c
Normal file
@ -0,0 +1,230 @@
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/*
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* Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
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* reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the NetLogic
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* license below:
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/irq.h>
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#include <asm/errno.h>
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#include <asm/signal.h>
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#include <asm/system.h>
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#include <asm/ptrace.h>
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#include <asm/mipsregs.h>
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#include <asm/thread_info.h>
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#include <asm/netlogic/mips-extns.h>
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#include <asm/netlogic/interrupt.h>
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#include <asm/netlogic/haldefs.h>
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#include <asm/netlogic/common.h>
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#include <asm/netlogic/xlr/iomap.h>
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#include <asm/netlogic/xlr/pic.h>
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/*
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* These are the routines that handle all the low level interrupt stuff.
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* Actions handled here are: initialization of the interrupt map, requesting of
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* interrupt lines by handlers, dispatching if interrupts to handlers, probing
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* for interrupt lines
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*/
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/* Globals */
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static uint64_t nlm_irq_mask;
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static DEFINE_SPINLOCK(nlm_pic_lock);
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static void xlp_pic_enable(struct irq_data *d)
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{
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unsigned long flags;
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int irt;
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irt = nlm_irq_to_irt(d->irq);
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if (irt == -1)
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return;
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spin_lock_irqsave(&nlm_pic_lock, flags);
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nlm_pic_enable_irt(nlm_pic_base, irt);
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spin_unlock_irqrestore(&nlm_pic_lock, flags);
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}
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static void xlp_pic_disable(struct irq_data *d)
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{
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unsigned long flags;
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int irt;
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irt = nlm_irq_to_irt(d->irq);
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if (irt == -1)
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return;
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spin_lock_irqsave(&nlm_pic_lock, flags);
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nlm_pic_disable_irt(nlm_pic_base, irt);
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spin_unlock_irqrestore(&nlm_pic_lock, flags);
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}
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static void xlp_pic_mask_ack(struct irq_data *d)
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{
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uint64_t mask = 1ull << d->irq;
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write_c0_eirr(mask); /* ack by writing EIRR */
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}
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static void xlp_pic_unmask(struct irq_data *d)
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{
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void *hd = irq_data_get_irq_handler_data(d);
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int irt;
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irt = nlm_irq_to_irt(d->irq);
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if (irt == -1)
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return;
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if (hd) {
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void (*extra_ack)(void *) = hd;
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extra_ack(d);
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}
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/* Ack is a single write, no need to lock */
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nlm_pic_ack(nlm_pic_base, irt);
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}
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static struct irq_chip xlp_pic = {
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.name = "XLP-PIC",
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.irq_enable = xlp_pic_enable,
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.irq_disable = xlp_pic_disable,
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.irq_mask_ack = xlp_pic_mask_ack,
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.irq_unmask = xlp_pic_unmask,
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};
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static void cpuintr_disable(struct irq_data *d)
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{
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uint64_t eimr;
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uint64_t mask = 1ull << d->irq;
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eimr = read_c0_eimr();
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write_c0_eimr(eimr & ~mask);
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}
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static void cpuintr_enable(struct irq_data *d)
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{
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uint64_t eimr;
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uint64_t mask = 1ull << d->irq;
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eimr = read_c0_eimr();
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write_c0_eimr(eimr | mask);
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}
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static void cpuintr_ack(struct irq_data *d)
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{
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uint64_t mask = 1ull << d->irq;
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write_c0_eirr(mask);
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}
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static void cpuintr_nop(struct irq_data *d)
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{
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WARN(d->irq >= PIC_IRQ_BASE, "Bad irq %d", d->irq);
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}
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/*
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* Chip definition for CPU originated interrupts(timer, msg) and
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* IPIs
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*/
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struct irq_chip nlm_cpu_intr = {
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.name = "XLP-CPU-INTR",
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.irq_enable = cpuintr_enable,
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.irq_disable = cpuintr_disable,
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.irq_mask = cpuintr_nop,
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.irq_ack = cpuintr_nop,
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.irq_eoi = cpuintr_ack,
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};
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void __init init_nlm_common_irqs(void)
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{
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int i, irq, irt;
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for (i = 0; i < PIC_IRT_FIRST_IRQ; i++)
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irq_set_chip_and_handler(i, &nlm_cpu_intr, handle_percpu_irq);
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for (i = PIC_IRT_FIRST_IRQ; i <= PIC_IRT_LAST_IRQ ; i++)
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irq_set_chip_and_handler(i, &xlp_pic, handle_level_irq);
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#ifdef CONFIG_SMP
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irq_set_chip_and_handler(IRQ_IPI_SMP_FUNCTION, &nlm_cpu_intr,
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nlm_smp_function_ipi_handler);
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irq_set_chip_and_handler(IRQ_IPI_SMP_RESCHEDULE, &nlm_cpu_intr,
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nlm_smp_resched_ipi_handler);
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nlm_irq_mask |=
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((1ULL << IRQ_IPI_SMP_FUNCTION) | (1ULL << IRQ_IPI_SMP_RESCHEDULE));
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#endif
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for (irq = PIC_IRT_FIRST_IRQ; irq <= PIC_IRT_LAST_IRQ; irq++) {
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irt = nlm_irq_to_irt(irq);
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if (irt == -1)
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continue;
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nlm_irq_mask |= (1ULL << irq);
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nlm_pic_init_irt(nlm_pic_base, irt, irq, 0);
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}
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nlm_irq_mask |= (1ULL << IRQ_TIMER);
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}
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void __init arch_init_irq(void)
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{
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/* Initialize the irq descriptors */
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init_nlm_common_irqs();
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write_c0_eimr(nlm_irq_mask);
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}
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void __cpuinit nlm_smp_irq_init(void)
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{
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/* set interrupt mask for non-zero cpus */
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write_c0_eimr(nlm_irq_mask);
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}
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asmlinkage void plat_irq_dispatch(void)
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{
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uint64_t eirr;
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int i;
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eirr = read_c0_eirr() & read_c0_eimr();
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if (eirr & (1 << IRQ_TIMER)) {
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do_IRQ(IRQ_TIMER);
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return;
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}
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i = __ilog2_u64(eirr);
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if (i == -1)
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return;
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do_IRQ(i);
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}
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188
arch/mips/netlogic/common/smp.c
Normal file
188
arch/mips/netlogic/common/smp.c
Normal file
@ -0,0 +1,188 @@
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/*
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* Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
|
||||
* reserved.
|
||||
*
|
||||
* This software is available to you under a choice of one of two
|
||||
* licenses. You may choose to be licensed under the terms of the GNU
|
||||
* General Public License (GPL) Version 2, available from the file
|
||||
* COPYING in the main directory of this source tree, or the NetLogic
|
||||
* license below:
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
|
||||
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
|
||||
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
|
||||
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/irq.h>
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#include <asm/mmu_context.h>
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#include <asm/netlogic/interrupt.h>
|
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#include <asm/netlogic/mips-extns.h>
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#include <asm/netlogic/haldefs.h>
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#include <asm/netlogic/common.h>
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#include <asm/netlogic/xlr/iomap.h>
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#include <asm/netlogic/xlr/pic.h>
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void nlm_send_ipi_single(int logical_cpu, unsigned int action)
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{
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int cpu = cpu_logical_map(logical_cpu);
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if (action & SMP_CALL_FUNCTION)
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nlm_pic_send_ipi(nlm_pic_base, cpu, IRQ_IPI_SMP_FUNCTION, 0);
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if (action & SMP_RESCHEDULE_YOURSELF)
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nlm_pic_send_ipi(nlm_pic_base, cpu, IRQ_IPI_SMP_RESCHEDULE, 0);
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}
|
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|
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void nlm_send_ipi_mask(const struct cpumask *mask, unsigned int action)
|
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{
|
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int cpu;
|
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|
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for_each_cpu(cpu, mask) {
|
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nlm_send_ipi_single(cpu, action);
|
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}
|
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}
|
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|
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/* IRQ_IPI_SMP_FUNCTION Handler */
|
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void nlm_smp_function_ipi_handler(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
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smp_call_function_interrupt();
|
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write_c0_eirr(1ull << irq);
|
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}
|
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|
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/* IRQ_IPI_SMP_RESCHEDULE handler */
|
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void nlm_smp_resched_ipi_handler(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
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scheduler_ipi();
|
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write_c0_eirr(1ull << irq);
|
||||
}
|
||||
|
||||
/*
|
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* Called before going into mips code, early cpu init
|
||||
*/
|
||||
void nlm_early_init_secondary(int cpu)
|
||||
{
|
||||
write_c0_ebase((uint32_t)nlm_common_ebase);
|
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#ifdef NLM_XLP
|
||||
if (cpu % 4 == 0)
|
||||
xlp_mmu_init();
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Code to run on secondary just after probing the CPU
|
||||
*/
|
||||
static void __cpuinit nlm_init_secondary(void)
|
||||
{
|
||||
nlm_smp_irq_init();
|
||||
}
|
||||
|
||||
void nlm_smp_finish(void)
|
||||
{
|
||||
#ifdef notyet
|
||||
nlm_common_msgring_cpu_init();
|
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#endif
|
||||
local_irq_enable();
|
||||
}
|
||||
|
||||
void nlm_cpus_done(void)
|
||||
{
|
||||
}
|
||||
|
||||
/*
|
||||
* Boot all other cpus in the system, initialize them, and bring them into
|
||||
* the boot function
|
||||
*/
|
||||
int nlm_cpu_unblock[NR_CPUS];
|
||||
int nlm_cpu_ready[NR_CPUS];
|
||||
unsigned long nlm_next_gp;
|
||||
unsigned long nlm_next_sp;
|
||||
cpumask_t phys_cpu_present_map;
|
||||
|
||||
void nlm_boot_secondary(int logical_cpu, struct task_struct *idle)
|
||||
{
|
||||
unsigned long gp = (unsigned long)task_thread_info(idle);
|
||||
unsigned long sp = (unsigned long)__KSTK_TOS(idle);
|
||||
int cpu = cpu_logical_map(logical_cpu);
|
||||
|
||||
nlm_next_sp = sp;
|
||||
nlm_next_gp = gp;
|
||||
|
||||
/* barrier */
|
||||
__sync();
|
||||
nlm_cpu_unblock[cpu] = 1;
|
||||
}
|
||||
|
||||
void __init nlm_smp_setup(void)
|
||||
{
|
||||
unsigned int boot_cpu;
|
||||
int num_cpus, i;
|
||||
|
||||
boot_cpu = hard_smp_processor_id();
|
||||
cpus_clear(phys_cpu_present_map);
|
||||
|
||||
cpu_set(boot_cpu, phys_cpu_present_map);
|
||||
__cpu_number_map[boot_cpu] = 0;
|
||||
__cpu_logical_map[0] = boot_cpu;
|
||||
cpu_set(0, cpu_possible_map);
|
||||
|
||||
num_cpus = 1;
|
||||
for (i = 0; i < NR_CPUS; i++) {
|
||||
/*
|
||||
* nlm_cpu_ready array is not set for the boot_cpu,
|
||||
* it is only set for ASPs (see smpboot.S)
|
||||
*/
|
||||
if (nlm_cpu_ready[i]) {
|
||||
cpu_set(i, phys_cpu_present_map);
|
||||
__cpu_number_map[i] = num_cpus;
|
||||
__cpu_logical_map[num_cpus] = i;
|
||||
cpu_set(num_cpus, cpu_possible_map);
|
||||
++num_cpus;
|
||||
}
|
||||
}
|
||||
|
||||
pr_info("Phys CPU present map: %lx, possible map %lx\n",
|
||||
(unsigned long)phys_cpu_present_map.bits[0],
|
||||
(unsigned long)cpu_possible_map.bits[0]);
|
||||
|
||||
pr_info("Detected %i Slave CPU(s)\n", num_cpus);
|
||||
}
|
||||
|
||||
void nlm_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
}
|
||||
|
||||
struct plat_smp_ops nlm_smp_ops = {
|
||||
.send_ipi_single = nlm_send_ipi_single,
|
||||
.send_ipi_mask = nlm_send_ipi_mask,
|
||||
.init_secondary = nlm_init_secondary,
|
||||
.smp_finish = nlm_smp_finish,
|
||||
.cpus_done = nlm_cpus_done,
|
||||
.boot_secondary = nlm_boot_secondary,
|
||||
.smp_setup = nlm_smp_setup,
|
||||
.prepare_cpus = nlm_prepare_cpus,
|
||||
};
|
||||
51
arch/mips/netlogic/common/time.c
Normal file
51
arch/mips/netlogic/common/time.c
Normal file
@ -0,0 +1,51 @@
|
||||
/*
|
||||
* Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
|
||||
* reserved.
|
||||
*
|
||||
* This software is available to you under a choice of one of two
|
||||
* licenses. You may choose to be licensed under the terms of the GNU
|
||||
* General Public License (GPL) Version 2, available from the file
|
||||
* COPYING in the main directory of this source tree, or the NetLogic
|
||||
* license below:
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
|
||||
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
||||
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
|
||||
* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
|
||||
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/time.h>
|
||||
#include <asm/netlogic/interrupt.h>
|
||||
#include <asm/netlogic/common.h>
|
||||
|
||||
unsigned int __cpuinit get_c0_compare_int(void)
|
||||
{
|
||||
return IRQ_TIMER;
|
||||
}
|
||||
|
||||
void __init plat_time_init(void)
|
||||
{
|
||||
mips_hpt_frequency = nlm_get_cpu_frequency();
|
||||
pr_info("MIPS counter frequency [%ld]\n",
|
||||
(unsigned long)mips_hpt_frequency);
|
||||
}
|
||||
Reference in New Issue
Block a user