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Initial blind fixup for arm for irq changes

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Untested, but this should fix up the bulk of the totally mechanical
issues, and should make the actual detail fixing easier.

Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Linus Torvalds
2006-10-06 10:53:39 -07:00
parent da104a8369
commit 0cd61b68c3
100 changed files with 281 additions and 328 deletions
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10
arch/arm/mach-versatile/core.c
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@@ -77,12 +77,12 @@ static struct irq_chip sic_chip = {
};
static void
sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
sic_handle_irq(unsigned int irq, struct irqdesc *desc)
{
unsigned long status = readl(VA_SIC_BASE + SIC_IRQ_STATUS);
if (status == 0) {
do_bad_IRQ(irq, desc, regs);
do_bad_IRQ(irq, desc);
return;
}
@@ -93,7 +93,7 @@ sic_handle_irq(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
irq += IRQ_SIC_START;
desc = irq_desc + irq;
desc_handle_irq(irq, desc, regs);
desc_handle_irq(irq, desc);
} while (status);
}
@@ -851,14 +851,14 @@ static unsigned long versatile_gettimeoffset(void)
/*
* IRQ handler for the timer
*/
static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id)
{
write_seqlock(&xtime_lock);
// ...clear the interrupt
writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
timer_tick(regs);
timer_tick();
write_sequnlock(&xtime_lock);