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MMC: CSD and CID timeout values

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The MMC spec states that the timeout for accessing the CSD and CID
registers is 64 clock cycles.

Signed-off-by: Matthew Fleming <matthew.fleming@imgtec.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
This commit is contained in:
Matthew Fleming
2008-10-02 12:24:05 +01:00
committed by Pierre Ossman
parent 7244b85bd1
commit 0d3e0460f3
1 changed files with 6 additions and 2 deletions
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8
drivers/mmc/core/mmc_ops.c
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@@ -248,8 +248,12 @@ mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host,
sg_init_one(&sg, data_buf, len); sg_init_one(&sg, data_buf, len);
if (card) /*
mmc_set_data_timeout(&data, card); * The spec states that CSR and CID accesses have a timeout
* of 64 clock cycles.
*/
data.timeout_ns = 0;
data.timeout_clks = 64;
mmc_wait_for_req(host, &mrq); mmc_wait_for_req(host, &mrq);