libata: convert to iomap
Convert libata core layer and LLDs to use iomap. * managed iomap is used. Pointer to pcim_iomap_table() is cached at host->iomap and used through out LLDs. This basically replaces host->mmio_base. * if possible, pcim_iomap_regions() is used Most iomap operation conversions are taken from Jeff Garzik <jgarzik@pobox.com>'s iomap branch. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@@ -50,6 +50,8 @@
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enum {
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PDC_MMIO_BAR = 3,
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/* register offsets */
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PDC_FEATURE = 0x04, /* Feature/Error reg (per port) */
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PDC_SECTOR_COUNT = 0x08, /* Sector count reg (per port) */
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@@ -167,7 +169,7 @@ static const struct ata_port_operations pdc_sata_ops = {
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.thaw = pdc_thaw,
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.error_handler = pdc_error_handler,
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.post_internal_cmd = pdc_post_internal_cmd,
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.data_xfer = ata_mmio_data_xfer,
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.data_xfer = ata_data_xfer,
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.irq_handler = pdc_interrupt,
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.irq_clear = pdc_irq_clear,
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@@ -192,7 +194,7 @@ static const struct ata_port_operations pdc_old_sata_ops = {
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.thaw = pdc_thaw,
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.error_handler = pdc_error_handler,
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.post_internal_cmd = pdc_post_internal_cmd,
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.data_xfer = ata_mmio_data_xfer,
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.data_xfer = ata_data_xfer,
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.irq_handler = pdc_interrupt,
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.irq_clear = pdc_irq_clear,
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@@ -214,7 +216,7 @@ static const struct ata_port_operations pdc_pata_ops = {
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.qc_prep = pdc_qc_prep,
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.qc_issue = pdc_qc_issue_prot,
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.data_xfer = ata_mmio_data_xfer,
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.data_xfer = ata_data_xfer,
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.eng_timeout = pdc_eng_timeout,
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.irq_handler = pdc_interrupt,
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.irq_clear = pdc_irq_clear,
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@@ -348,7 +350,7 @@ static int pdc_port_start(struct ata_port *ap)
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static void pdc_reset_port(struct ata_port *ap)
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{
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void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr + PDC_CTLSTAT;
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void __iomem *mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT;
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unsigned int i;
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u32 tmp;
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@@ -394,7 +396,7 @@ static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
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{
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if (sc_reg > SCR_CONTROL || ap->cbl != ATA_CBL_SATA)
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return 0xffffffffU;
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return readl((void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
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return readl(ap->ioaddr.scr_addr + (sc_reg * 4));
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}
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@@ -403,7 +405,7 @@ static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg,
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{
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if (sc_reg > SCR_CONTROL || ap->cbl != ATA_CBL_SATA)
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return;
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writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
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writel(val, ap->ioaddr.scr_addr + (sc_reg * 4));
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}
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static void pdc_atapi_pkt(struct ata_queued_cmd *qc)
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@@ -627,7 +629,7 @@ static inline unsigned int pdc_host_intr( struct ata_port *ap,
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{
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unsigned int handled = 0;
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u32 tmp;
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void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr + PDC_GLOBAL_CTL;
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void __iomem *mmio = ap->ioaddr.cmd_addr + PDC_GLOBAL_CTL;
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tmp = readl(mmio);
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if (tmp & PDC_ERR_MASK) {
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@@ -656,7 +658,7 @@ static inline unsigned int pdc_host_intr( struct ata_port *ap,
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static void pdc_irq_clear(struct ata_port *ap)
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{
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struct ata_host *host = ap->host;
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void __iomem *mmio = host->mmio_base;
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void __iomem *mmio = host->iomap[PDC_MMIO_BAR];
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readl(mmio + PDC_INT_SEQMASK);
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}
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@@ -672,12 +674,12 @@ static irqreturn_t pdc_interrupt (int irq, void *dev_instance)
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VPRINTK("ENTER\n");
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if (!host || !host->mmio_base) {
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if (!host || !host->iomap[PDC_MMIO_BAR]) {
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VPRINTK("QUICK EXIT\n");
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return IRQ_NONE;
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}
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mmio_base = host->mmio_base;
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mmio_base = host->iomap[PDC_MMIO_BAR];
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/* reading should also clear interrupts */
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mask = readl(mmio_base + PDC_INT_SEQMASK);
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@@ -722,18 +724,19 @@ static inline void pdc_packet_start(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct pdc_port_priv *pp = ap->private_data;
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void __iomem *mmio = ap->host->iomap[PDC_MMIO_BAR];
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unsigned int port_no = ap->port_no;
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u8 seq = (u8) (port_no + 1);
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VPRINTK("ENTER, ap %p\n", ap);
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writel(0x00000001, ap->host->mmio_base + (seq * 4));
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readl(ap->host->mmio_base + (seq * 4)); /* flush */
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writel(0x00000001, mmio + (seq * 4));
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readl(mmio + (seq * 4)); /* flush */
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pp->pkt[2] = seq;
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wmb(); /* flush PRD, pkt writes */
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writel(pp->pkt_dma, (void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
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readl((void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); /* flush */
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writel(pp->pkt_dma, ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
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readl(ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); /* flush */
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}
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static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc)
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@@ -808,7 +811,7 @@ static int pdc_old_check_atapi_dma(struct ata_queued_cmd *qc)
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return pdc_check_atapi_dma(qc);
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}
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static void pdc_ata_setup_port(struct ata_ioports *port, unsigned long base)
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static void pdc_ata_setup_port(struct ata_ioports *port, void __iomem *base)
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{
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port->cmd_addr = base;
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port->data_addr = base;
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@@ -828,7 +831,7 @@ static void pdc_ata_setup_port(struct ata_ioports *port, unsigned long base)
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static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
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{
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void __iomem *mmio = pe->mmio_base;
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void __iomem *mmio = pe->iomap[PDC_MMIO_BAR];
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struct pdc_host_priv *hp = pe->private_data;
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int hotplug_offset;
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u32 tmp;
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@@ -884,8 +887,7 @@ static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
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static int printed_version;
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struct ata_probe_ent *probe_ent;
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struct pdc_host_priv *hp;
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unsigned long base;
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void __iomem *mmio_base;
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void __iomem *base;
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unsigned int board_idx = (unsigned int) ent->driver_data;
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int rc;
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u8 tmp;
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@@ -897,11 +899,11 @@ static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
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if (rc)
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return rc;
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rc = pci_request_regions(pdev, DRV_NAME);
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if (rc) {
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rc = pcim_iomap_regions(pdev, 1 << PDC_MMIO_BAR, DRV_NAME);
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if (rc == -EBUSY)
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pcim_pin_device(pdev);
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if (rc)
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return rc;
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}
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rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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if (rc)
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@@ -917,11 +919,6 @@ static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
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probe_ent->dev = pci_dev_to_dev(pdev);
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INIT_LIST_HEAD(&probe_ent->node);
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mmio_base = pcim_iomap(pdev, 3, 0);
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if (mmio_base == NULL)
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return -ENOMEM;
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base = (unsigned long) mmio_base;
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hp = devm_kzalloc(&pdev->dev, sizeof(*hp), GFP_KERNEL);
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if (hp == NULL)
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return -ENOMEM;
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@@ -937,7 +934,9 @@ static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
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probe_ent->irq = pdev->irq;
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probe_ent->irq_flags = IRQF_SHARED;
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probe_ent->mmio_base = mmio_base;
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probe_ent->iomap = pcim_iomap_table(pdev);
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base = probe_ent->iomap[PDC_MMIO_BAR];
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pdc_ata_setup_port(&probe_ent->port[0], base + 0x200);
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pdc_ata_setup_port(&probe_ent->port[1], base + 0x280);
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@@ -964,7 +963,7 @@ static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *e
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/* Fall through */
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case board_2037x:
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/* TX2plus boards also have a PATA port */
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tmp = readb(mmio_base + PDC_FLASH_CTL+1);
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tmp = readb(base + PDC_FLASH_CTL+1);
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if (!(tmp & 0x80)) {
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probe_ent->n_ports = 3;
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pdc_ata_setup_port(&probe_ent->port[2], base + 0x300);
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