MIPS: Add Cavium OCTEON processor constants and CPU probe.
Add OCTEON constants to asm/cpu.h and asm/module.h. Add probe function for Cavium OCTEON CPUs and hook it up. Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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committed by
Ralf Baechle
parent
25c3000300
commit
0dd4781bca
@@ -154,6 +154,7 @@ void __init check_wait(void)
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case CPU_25KF:
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case CPU_PR4450:
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case CPU_BCM3302:
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case CPU_CAVIUM_OCTEON:
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cpu_wait = r4k_wait;
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break;
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@@ -875,6 +876,27 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
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}
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}
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static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
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{
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decode_configs(c);
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switch (c->processor_id & 0xff00) {
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case PRID_IMP_CAVIUM_CN38XX:
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case PRID_IMP_CAVIUM_CN31XX:
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case PRID_IMP_CAVIUM_CN30XX:
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case PRID_IMP_CAVIUM_CN58XX:
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case PRID_IMP_CAVIUM_CN56XX:
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case PRID_IMP_CAVIUM_CN50XX:
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case PRID_IMP_CAVIUM_CN52XX:
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c->cputype = CPU_CAVIUM_OCTEON;
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__cpu_name[cpu] = "Cavium Octeon";
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break;
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default:
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printk(KERN_INFO "Unknown Octeon chip!\n");
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c->cputype = CPU_UNKNOWN;
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break;
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}
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}
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const char *__cpu_name[NR_CPUS];
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__cpuinit void cpu_probe(void)
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@@ -909,6 +931,9 @@ __cpuinit void cpu_probe(void)
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case PRID_COMP_NXP:
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cpu_probe_nxp(c, cpu);
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break;
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case PRID_COMP_CAVIUM:
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cpu_probe_cavium(c, cpu);
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break;
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}
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BUG_ON(!__cpu_name[cpu]);
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