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staging:r8190: coding style: Fixed checkpatch reported Error

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This is a patch to the r8190_rtl8256.c file that fixes
checkpatch reported space & coding style issues.

Signed-off-by: Sanjeev Sharma <Sanjeev_Sharma@mentor.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Sanjeev Sharma
2014-07-31 11:13:31 +05:30
committed by Greg Kroah-Hartman
parent 6b2616699c
commit 104cb5c0dd
1 changed files with 78 additions and 89 deletions
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167
drivers/staging/rtl8192u/r8190_rtl8256.c
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@@ -23,62 +23,64 @@
* Return: NONE * Return: NONE
* Note: 8226 support both 20M and 40 MHz * Note: 8226 support both 20M and 40 MHz
*---------------------------------------------------------------------------*/ *---------------------------------------------------------------------------*/
void PHY_SetRF8256Bandwidth(struct net_device *dev , HT_CHANNEL_WIDTH Bandwidth) //20M or 40M void PHY_SetRF8256Bandwidth(struct net_device *dev , HT_CHANNEL_WIDTH Bandwidth)
{ {
u8 eRFPath; u8 eRFPath;
struct r8192_priv *priv = ieee80211_priv(dev); struct r8192_priv *priv = ieee80211_priv(dev);
//for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath; eRFPath++) /* for(eRFPath = RF90_PATH_A; eRFPath <pHalData->NumTotalRFPath;
for(eRFPath = 0; eRFPath <RF90_PATH_MAX; eRFPath++) * eRFPath++)
{ */
for (eRFPath = 0; eRFPath < RF90_PATH_MAX; eRFPath++) {
if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath)) if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
continue; continue;
switch (Bandwidth) switch (Bandwidth) {
{ case HT_CHANNEL_WIDTH_20:
case HT_CHANNEL_WIDTH_20: if (priv->card_8192_version == VERSION_819xU_A
if(priv->card_8192_version == VERSION_819xU_A || priv->card_8192_version == VERSION_819xU_B)// 8256 D-cut, E-cut, xiong: consider it later! || priv->card_8192_version
{ == VERSION_819xU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x100); //phy para:1ba rtl8192_phy_SetRFReg(dev,
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3d7); (RF90_RADIO_PATH_E)eRFPath,
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x021); 0x0b, bMask12Bits, 0x100); /* phy para:1ba */
rtl8192_phy_SetRFReg(dev,
(RF90_RADIO_PATH_E)eRFPath,
0x2c, bMask12Bits, 0x3d7);
rtl8192_phy_SetRFReg(dev,
(RF90_RADIO_PATH_E)eRFPath,
0x0e, bMask12Bits, 0x021);
//cosa add for sd3's request 01/23/2008 /* cosa add for sd3's request 01/23/2008
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab); */
} rtl8192_phy_SetRFReg(dev,
else (RF90_RADIO_PATH_E)eRFPath,
{ 0x14, bMask12Bits, 0x5ab);
} else {
RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
} }
break; break;
case HT_CHANNEL_WIDTH_20_40: case HT_CHANNEL_WIDTH_20_40:
if(priv->card_8192_version == VERSION_819xU_A ||priv->card_8192_version == VERSION_819xU_B)// 8256 D-cut, E-cut, xiong: consider it later! if (priv->card_8192_version == VERSION_819xU_A || priv->card_8192_version == VERSION_819xU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */
{
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x300); //phy para:3ba rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x300); //phy para:3ba
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3df); rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3df);
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x0a1); rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x0a1);
//cosa add for sd3's request 01/23/2008 //cosa add for sd3's request 01/23/2008
if(priv->chan == 3 || priv->chan == 9) //I need to set priv->chan whenever current channel changes if (priv->chan == 3 || priv->chan == 9)
//I need to set priv->chan whenever current channel changes
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x59b); rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x59b);
else else
rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab); rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab);
} } else {
else
{
RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n");
} }
break; break;
default: default:
RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth); RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown Bandwidth: %#X\n", Bandwidth);
break; break;
} }
} }
return;
} }
/*-------------------------------------------------------------------------- /*--------------------------------------------------------------------------
* Overview: Interface to config 8256 * Overview: Interface to config 8256
@@ -95,8 +97,6 @@ void PHY_RF8256_Config(struct net_device *dev)
priv->NumTotalRFPath = RTL819X_TOTAL_RF_PATH; priv->NumTotalRFPath = RTL819X_TOTAL_RF_PATH;
// Config BB and RF // Config BB and RF
phy_RF8256_Config_ParaFile(dev); phy_RF8256_Config_ParaFile(dev);
return;
} }
/*-------------------------------------------------------------------------- /*--------------------------------------------------------------------------
* Overview: Interface to config 8256 * Overview: Interface to config 8256
@@ -122,8 +122,7 @@ void phy_RF8256_Config_ParaFile(struct net_device *dev)
//3//----------------------------------------------------------------- //3//-----------------------------------------------------------------
//3// <2> Initialize RF //3// <2> Initialize RF
//3//----------------------------------------------------------------- //3//-----------------------------------------------------------------
for(eRFPath = (RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath <priv->NumTotalRFPath; eRFPath++) for (eRFPath = (RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath < priv->NumTotalRFPath; eRFPath++) {
{
if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath)) if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath))
continue; continue;
@@ -133,13 +132,12 @@ void phy_RF8256_Config_ParaFile(struct net_device *dev)
// pHalData->RfReg0Value[eRFPath] = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rGlobalCtrl, bMaskDWord); // pHalData->RfReg0Value[eRFPath] = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rGlobalCtrl, bMaskDWord);
/*----Store original RFENV control type----*/ /*----Store original RFENV control type----*/
switch (eRFPath) switch (eRFPath) {
{
case RF90_PATH_A: case RF90_PATH_A:
case RF90_PATH_C: case RF90_PATH_C:
u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV); u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV);
break; break;
case RF90_PATH_B : case RF90_PATH_B:
case RF90_PATH_D: case RF90_PATH_D:
u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16); u4RegValue = rtl8192_QueryBBReg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16);
break; break;
@@ -159,8 +157,7 @@ void phy_RF8256_Config_ParaFile(struct net_device *dev)
/*----Check RF block (for FPGA platform only)----*/ /*----Check RF block (for FPGA platform only)----*/
// TODO: this function should be removed on ASIC , Emily 2007.2.2 // TODO: this function should be removed on ASIC , Emily 2007.2.2
if (rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (RF90_RADIO_PATH_E)eRFPath)) if (rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (RF90_RADIO_PATH_E)eRFPath)) {
{
RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath); RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath);
goto phy_RF8256_Config_ParaFile_Fail; goto phy_RF8256_Config_ParaFile_Fail;
} }
@@ -168,39 +165,34 @@ void phy_RF8256_Config_ParaFile(struct net_device *dev)
RetryTimes = ConstRetryTimes; RetryTimes = ConstRetryTimes;
RF3_Final_Value = 0; RF3_Final_Value = 0;
/*----Initialize RF fom connfiguration file----*/ /*----Initialize RF fom connfiguration file----*/
switch (eRFPath) switch (eRFPath) {
{
case RF90_PATH_A: case RF90_PATH_A:
while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0) while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) {
{ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath);
ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--; RetryTimes--;
} }
break; break;
case RF90_PATH_B: case RF90_PATH_B:
while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0) while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) {
{ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath);
ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--; RetryTimes--;
} }
break; break;
case RF90_PATH_C: case RF90_PATH_C:
while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0) while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) {
{ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath);
ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--; RetryTimes--;
} }
break; break;
case RF90_PATH_D: case RF90_PATH_D:
while(RF3_Final_Value!=RegValueToBeCheck && RetryTimes!=0) while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) {
{ ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath);
ret = rtl8192_phy_ConfigRFWithHeaderFile(dev,(RF90_RADIO_PATH_E)eRFPath);
RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits);
RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value);
RetryTimes--; RetryTimes--;
@@ -209,50 +201,48 @@ void phy_RF8256_Config_ParaFile(struct net_device *dev)
} }
/*----Restore RFENV control type----*/; /*----Restore RFENV control type----*/;
switch (eRFPath) switch (eRFPath) {
{
case RF90_PATH_A: case RF90_PATH_A:
case RF90_PATH_C: case RF90_PATH_C:
rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue);
break; break;
case RF90_PATH_B : case RF90_PATH_B:
case RF90_PATH_D: case RF90_PATH_D:
rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); rtl8192_setBBreg(dev, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue);
break; break;
} }
if(ret){ if (ret) {
RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath); RT_TRACE(COMP_ERR, "phy_RF8256_Config_ParaFile():Radio[%d] Fail!!", eRFPath);
goto phy_RF8256_Config_ParaFile_Fail; goto phy_RF8256_Config_ParaFile_Fail;
} }
} }
RT_TRACE(COMP_PHY, "PHY Initialization Success\n") ; RT_TRACE(COMP_PHY, "PHY Initialization Success\n");
return ; return;
phy_RF8256_Config_ParaFile_Fail: phy_RF8256_Config_ParaFile_Fail:
RT_TRACE(COMP_ERR, "PHY Initialization failed\n") ; RT_TRACE(COMP_ERR, "PHY Initialization failed\n");
return ;
} }
void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel) void PHY_SetRF8256CCKTxPower(struct net_device *dev, u8 powerlevel)
{ {
u32 TxAGC=0; u32 TxAGC = 0;
struct r8192_priv *priv = ieee80211_priv(dev); struct r8192_priv *priv = ieee80211_priv(dev);
//modified by vivi, 20080109 //modified by vivi, 20080109
TxAGC = powerlevel; TxAGC = powerlevel;
if(priv->bDynamicTxLowPower == TRUE) //cosa 05/22/2008 for scan if (priv->bDynamicTxLowPower == TRUE) {
{ //cosa 05/22/2008 for scan
if(priv->CustomerID == RT_CID_819x_Netcore) if (priv->CustomerID == RT_CID_819x_Netcore)
TxAGC = 0x22; TxAGC = 0x22;
else else
TxAGC += priv->CckPwEnl; TxAGC += priv->CckPwEnl;
} }
if(TxAGC > 0x24) if (TxAGC > 0x24)
TxAGC = 0x24; TxAGC = 0x24;
rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC); rtl8192_setBBreg(dev, rTxAGC_CCK_Mcs32, bTxAGCRateCCK, TxAGC);
} }
@@ -268,43 +258,42 @@ void PHY_SetRF8256OFDMTxPower(struct net_device *dev, u8 powerlevel)
u8 byte0, byte1, byte2, byte3; u8 byte0, byte1, byte2, byte3;
powerBase0 = powerlevel + priv->TxPowerDiff; //OFDM rates powerBase0 = powerlevel + priv->TxPowerDiff; //OFDM rates
powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; powerBase0 = (powerBase0<<24) | (powerBase0<<16) | (powerBase0<<8) | powerBase0;
powerBase1 = powerlevel; //MCS rates powerBase1 = powerlevel; //MCS rates
powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; powerBase1 = (powerBase1<<24) | (powerBase1<<16) | (powerBase1<<8) | powerBase1;
for(index=0; index<6; index++) for (index = 0; index < 6; index++) {
{ writeVal = priv->MCSTxPowerLevelOriginalOffset[index] + ((index < 2)?powerBase0:powerBase1);
writeVal = priv->MCSTxPowerLevelOriginalOffset[index] + ((index<2)?powerBase0:powerBase1);
byte0 = (u8)(writeVal & 0x7f); byte0 = (u8)(writeVal & 0x7f);
byte1 = (u8)((writeVal & 0x7f00)>>8); byte1 = (u8)((writeVal & 0x7f00)>>8);
byte2 = (u8)((writeVal & 0x7f0000)>>16); byte2 = (u8)((writeVal & 0x7f0000)>>16);
byte3 = (u8)((writeVal & 0x7f000000)>>24); byte3 = (u8)((writeVal & 0x7f000000)>>24);
if(byte0 > 0x24) // Max power index = 0x24
if (byte0 > 0x24)
/* Max power index = 0x24 */
byte0 = 0x24; byte0 = 0x24;
if(byte1 > 0x24) if (byte1 > 0x24)
byte1 = 0x24; byte1 = 0x24;
if(byte2 > 0x24) if (byte2 > 0x24)
byte2 = 0x24; byte2 = 0x24;
if(byte3 > 0x24) if (byte3 > 0x24)
byte3 = 0x24; byte3 = 0x24;
//for tx power track //for tx power track
if(index == 3) if (index == 3) {
{ writeVal_tmp = (byte3<<24) | (byte2<<16) | (byte1<<8) | byte0;
writeVal_tmp = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0;
priv->Pwr_Track = writeVal_tmp; priv->Pwr_Track = writeVal_tmp;
} }
if(priv->bDynamicTxHighPower == TRUE) //Add by Jacken 2008/03/06 if (priv->bDynamicTxHighPower == TRUE) {
{ /*Add by Jacken 2008/03/06
// Emily, 20080613. Set low tx power for both MCS and legacy OFDM *Emily, 20080613. Set low tx power for both MCS and legacy OFDM
*/
writeVal = 0x03030303; writeVal = 0x03030303;
} } else {
else writeVal = (byte3<<24) | (byte2<<16) | (byte1<<8) | byte0;
{ }
writeVal = (byte3<<24) | (byte2<<16) |(byte1<<8) |byte0; rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
}
rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal);
} }
return; return;