arm/imx: add gic_handle_irq function
This is a plain translation of assembly gic irq handler to C function for CONFIG_MULTI_IRQ_HANDLER support on imx family. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@@ -5,7 +5,7 @@
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# Common support
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# Common support
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obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o
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obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o
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# MX51 uses the TZIC interrupt controller, older platforms use AVIC
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obj-$(CONFIG_ARM_GIC) += gic.o
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obj-$(CONFIG_MXC_TZIC) += tzic.o
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obj-$(CONFIG_MXC_TZIC) += tzic.o
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obj-$(CONFIG_MXC_AVIC) += avic.o
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obj-$(CONFIG_MXC_AVIC) += avic.o
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48
arch/arm/plat-mxc/gic.c
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48
arch/arm/plat-mxc/gic.c
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@@ -0,0 +1,48 @@
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/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/io.h>
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#include <asm/exception.h>
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#include <asm/localtimer.h>
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#include <asm/hardware/gic.h>
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#ifdef CONFIG_SMP
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#include <asm/smp.h>
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#endif
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asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
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{
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u32 irqstat, irqnr;
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do {
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irqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK);
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irqnr = irqstat & 0x3ff;
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if (irqnr == 1023)
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break;
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if (irqnr > 29 && irqnr < 1021)
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handle_IRQ(irqnr, regs);
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#ifdef CONFIG_SMP
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else if (irqnr < 16) {
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writel_relaxed(irqstat, gic_cpu_base_addr +
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GIC_CPU_EOI);
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handle_IPI(irqnr, regs);
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}
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#endif
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#ifdef CONFIG_LOCAL_TIMERS
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else if (irqnr == 29) {
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writel_relaxed(irqstat, gic_cpu_base_addr +
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GIC_CPU_EOI);
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handle_local_timer(regs);
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}
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#endif
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} while (1);
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}
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@@ -86,6 +86,7 @@ extern void imx_print_silicon_rev(const char *cpu, int srev);
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void avic_handle_irq(struct pt_regs *);
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void avic_handle_irq(struct pt_regs *);
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void tzic_handle_irq(struct pt_regs *);
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void tzic_handle_irq(struct pt_regs *);
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void gic_handle_irq(struct pt_regs *);
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#define imx1_handle_irq avic_handle_irq
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#define imx1_handle_irq avic_handle_irq
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#define imx21_handle_irq avic_handle_irq
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#define imx21_handle_irq avic_handle_irq
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@@ -96,5 +97,6 @@ void tzic_handle_irq(struct pt_regs *);
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#define imx50_handle_irq tzic_handle_irq
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#define imx50_handle_irq tzic_handle_irq
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#define imx51_handle_irq tzic_handle_irq
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#define imx51_handle_irq tzic_handle_irq
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#define imx53_handle_irq tzic_handle_irq
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#define imx53_handle_irq tzic_handle_irq
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#define imx6q_handle_irq gic_handle_irq
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#endif
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#endif
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@@ -22,3 +22,9 @@
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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.endm
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.endm
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.macro test_for_ipi, irqnr, irqstat, base, tmp
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.endm
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.macro test_for_ltirq, irqnr, irqstat, base, tmp
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.endm
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