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perf, x86: Add Nehelem PMU programming errata workaround

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Implement the workaround for Intel Errata AAK100 and AAP53.

Also, remove the Core-i7 name for Nehalem events since there are
also Westmere based i7 chips.

Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@google.com>
LKML-Reference: <1269608924.12097.147.camel@laptop>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Peter Zijlstra
2010-03-26 14:08:44 +01:00
committed by Ingo Molnar
parent ea8e61b7bb
commit 11164cd4f6
4 changed files with 45 additions and 10 deletions
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arch/x86/kernel/cpu/perf_event_p6.c
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@@ -66,7 +66,7 @@ static void p6_pmu_disable_all(void)
wrmsrl(MSR_P6_EVNTSEL0, val);
}
static void p6_pmu_enable_all(void)
static void p6_pmu_enable_all(int added)
{
unsigned long val;