Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (106 commits) powerpc/p3060qds: Add support for P3060QDS board powerpc/83xx: Add shutdown request support to MCU handling on MPC8349 MITX powerpc/85xx: Make kexec to interate over online cpus powerpc/fsl_booke: Fix comment in head_fsl_booke.S powerpc/85xx: issue 15 EOI after core reset for FSL CoreNet devices powerpc/8xxx: Fix interrupt handling in MPC8xxx GPIO driver powerpc/85xx: Add 'fsl,pq3-gpio' compatiable for GPIO driver powerpc/86xx: Correct Gianfar support for GE boards powerpc/cpm: Clear muram before it is in use. drivers/virt: add ioctl for 32-bit compat on 64-bit to fsl-hv-manager powerpc/fsl_msi: add support for "msi-address-64" property powerpc/85xx: Setup secondary cores PIR with hard SMP id powerpc/fsl-booke: Fix settlbcam for 64-bit powerpc/85xx: Adding DCSR node to dtsi device trees powerpc/85xx: clean up FPGA device tree nodes for Freecsale QorIQ boards powerpc/85xx: fix PHYS_64BIT selection for P1022DS powerpc/fsl-booke: Fix setup_initial_memory_limit to not blindly map powerpc: respect mem= setting for early memory limit setup powerpc: Update corenet64_smp_defconfig powerpc: Update mpc85xx/corenet 32-bit defconfigs ... Fix up trivial conflicts in: - arch/powerpc/configs/40x/hcu4_defconfig removed stale file, edited elsewhere - arch/powerpc/include/asm/udbg.h, arch/powerpc/kernel/udbg.c: added opal and gelic drivers vs added ePAPR driver - drivers/tty/serial/8250.c moved UPIO_TSI to powerpc vs removed UPIO_DWAPB support
This commit is contained in:
Linus Torvalds
@ -23,19 +23,26 @@
|
||||
|
||||
soc5200@f0000000 {
|
||||
timer@600 { // General Purpose Timer
|
||||
#gpio-cells = <2>;
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||||
fsl,has-wdt;
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gpio-controller;
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||||
};
|
||||
|
||||
timer@610 {
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||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
rtc@800 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can@900 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can@980 {
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||||
status = "disabled";
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||||
spi@f00 {
|
||||
msp430@0 {
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||||
compatible = "spidev";
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||||
spi-max-frequency = <32000>;
|
||||
reg = <0>;
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||||
};
|
||||
};
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||||
|
||||
psc@2000 { // PSC1
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||||
@ -73,11 +80,16 @@
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};
|
||||
|
||||
i2c@3d00 {
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||||
rtc@50 {
|
||||
eeprom@50 {
|
||||
compatible = "at,24c08";
|
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reg = <0x50>;
|
||||
};
|
||||
|
||||
rtc@56 {
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||||
compatible = "mc,rv3029c2";
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||||
reg = <0x56>;
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||||
};
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||||
|
||||
rtc@68 {
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||||
compatible = "dallas,ds1339";
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reg = <0x68>;
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||||
@ -90,11 +102,22 @@
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||||
};
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||||
|
||||
pci@f0000d00 {
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status = "disabled";
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||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3
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0xc000 0 0 2 &mpc5200_pic 0 0 3
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0xc000 0 0 3 &mpc5200_pic 0 0 3
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0xc000 0 0 4 &mpc5200_pic 0 0 3>;
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clock-frequency = <0>; // From boot loader
|
||||
interrupts = <2 8 0 2 9 0 2 10 0>;
|
||||
bus-range = <0 0>;
|
||||
ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000
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0x02000000 0 0x90000000 0x90000000 0 0x10000000
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0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
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||||
};
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||||
|
||||
localbus {
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ranges = <0 0 0xff000000 0x1000000>;
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ranges = <0 0 0xff000000 0x1000000
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4 0 0x60000000 0x0001000>;
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||||
|
||||
// 16-bit flash device at LocalPlus Bus CS0
|
||||
flash@0,0 {
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||||
@ -122,5 +145,25 @@
|
||||
reg = <0x00f00000 0x100000>;
|
||||
};
|
||||
};
|
||||
|
||||
can@4,0 {
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||||
compatible = "nxp,sja1000";
|
||||
reg = <4 0x000 0x80>;
|
||||
nxp,external-clock-frequency = <24000000>;
|
||||
interrupts = <1 2 3>; // Level-low
|
||||
};
|
||||
|
||||
can@4,100 {
|
||||
compatible = "nxp,sja1000";
|
||||
reg = <4 0x100 0x80>;
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||||
nxp,external-clock-frequency = <24000000>;
|
||||
interrupts = <1 2 3>; // Level-low
|
||||
};
|
||||
|
||||
serial@4,200 {
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||||
compatible = "nxp,sc28l92";
|
||||
reg = <4 0x200 0x10>;
|
||||
interrupts = <1 3 3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -269,14 +269,16 @@
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "gmii";
|
||||
|
||||
@ -290,25 +292,48 @@
|
||||
interrupt-parent = <&gef_pic>;
|
||||
interrupts = <0x9 0x4>;
|
||||
reg = <1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupt-parent = <&gef_pic>;
|
||||
interrupts = <0x8 0x4>;
|
||||
reg = <3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <2>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi2>;
|
||||
phy-handle = <&phy2>;
|
||||
phy-connection-type = "gmii";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
|
||||
@ -267,14 +267,16 @@
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "gmii";
|
||||
|
||||
@ -288,25 +290,48 @@
|
||||
interrupt-parent = <&gef_pic>;
|
||||
interrupts = <0x9 0x4>;
|
||||
reg = <1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupt-parent = <&gef_pic>;
|
||||
interrupts = <0x8 0x4>;
|
||||
reg = <3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <2>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi2>;
|
||||
phy-handle = <&phy2>;
|
||||
phy-connection-type = "gmii";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
|
||||
@ -267,14 +267,16 @@
|
||||
enet0: ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x24000 0x1000>;
|
||||
ranges = <0x0 0x24000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
|
||||
interrupts = <29 2 30 2 34 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi0>;
|
||||
phy-handle = <&phy0>;
|
||||
phy-connection-type = "gmii";
|
||||
|
||||
@ -288,25 +290,48 @@
|
||||
interrupt-parent = <&gef_pic>;
|
||||
interrupts = <0x9 0x4>;
|
||||
reg = <1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
phy2: ethernet-phy@2 {
|
||||
interrupt-parent = <&gef_pic>;
|
||||
interrupts = <0x8 0x4>;
|
||||
reg = <3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
tbi0: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
enet1: ethernet@26000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
cell-index = <2>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <0x26000 0x1000>;
|
||||
ranges = <0x0 0x26000 0x1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>;
|
||||
interrupts = <31 2 32 2 33 2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
tbi-handle = <&tbi2>;
|
||||
phy-handle = <&phy2>;
|
||||
phy-connection-type = "gmii";
|
||||
|
||||
mdio@520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,gianfar-tbi";
|
||||
reg = <0x520 0x20>;
|
||||
|
||||
tbi2: tbi-phy@11 {
|
||||
reg = <0x11>;
|
||||
device_type = "tbi-phy";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial0: serial@4500 {
|
||||
|
||||
@ -1,168 +0,0 @@
|
||||
/*
|
||||
* Device Tree Source for Netstal Maschinen HCU4
|
||||
* based on the IBM Walnut
|
||||
*
|
||||
* Copyright 2008
|
||||
* Niklaus Giger <niklaus.giger@member.fsf.org>
|
||||
*
|
||||
* Copyright 2007 IBM Corp.
|
||||
* Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public
|
||||
* License version 2. This program is licensed "as is" without
|
||||
* any warranty of any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
model = "netstal,hcu4";
|
||||
compatible = "netstal,hcu4";
|
||||
dcr-parent = <0x1>;
|
||||
|
||||
aliases {
|
||||
ethernet0 = "/plb/opb/ethernet@ef600800";
|
||||
serial0 = "/plb/opb/serial@ef600300";
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
model = "PowerPC,405GPr";
|
||||
reg = <0x0>;
|
||||
clock-frequency = <0>; /* Filled in by U-Boot */
|
||||
timebase-frequency = <0x0>; /* Filled in by U-Boot */
|
||||
i-cache-line-size = <0x20>;
|
||||
d-cache-line-size = <0x20>;
|
||||
i-cache-size = <0x4000>;
|
||||
d-cache-size = <0x4000>;
|
||||
dcr-controller;
|
||||
dcr-access-method = "native";
|
||||
linux,phandle = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x0>; /* Filled in by U-Boot */
|
||||
};
|
||||
|
||||
UIC0: interrupt-controller {
|
||||
compatible = "ibm,uic";
|
||||
interrupt-controller;
|
||||
cell-index = <0x0>;
|
||||
dcr-reg = <0xc0 0x9>;
|
||||
#address-cells = <0x0>;
|
||||
#size-cells = <0x0>;
|
||||
#interrupt-cells = <0x2>;
|
||||
linux,phandle = <0x2>;
|
||||
};
|
||||
|
||||
plb {
|
||||
compatible = "ibm,plb3";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
ranges;
|
||||
clock-frequency = <0x0>; /* Filled in by U-Boot */
|
||||
|
||||
SDRAM0: memory-controller {
|
||||
compatible = "ibm,sdram-405gp";
|
||||
dcr-reg = <0x10 0x2>;
|
||||
};
|
||||
|
||||
MAL: mcmal {
|
||||
compatible = "ibm,mcmal-405gp", "ibm,mcmal";
|
||||
dcr-reg = <0x180 0x62>;
|
||||
num-tx-chans = <0x1>;
|
||||
num-rx-chans = <0x1>;
|
||||
interrupt-parent = <0x2>;
|
||||
interrupts = <0xb 0x4 0xc 0x4 0xa 0x4 0xd 0x4 0xe 0x4>;
|
||||
linux,phandle = <0x3>;
|
||||
};
|
||||
|
||||
POB0: opb {
|
||||
compatible = "ibm,opb-405gp", "ibm,opb";
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
ranges = <0xef600000 0xef600000 0xa00000>;
|
||||
dcr-reg = <0xa0 0x5>;
|
||||
clock-frequency = <0x0>; /* Filled in by U-Boot */
|
||||
|
||||
UART0: serial@ef600300 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0xef600300 0x8>;
|
||||
virtual-reg = <0xef600300>;
|
||||
clock-frequency = <0x0>;/* Filled in by U-Boot */
|
||||
current-speed = <0>; /* Filled in by U-Boot */
|
||||
interrupt-parent = <0x2>;
|
||||
interrupts = <0x0 0x4>;
|
||||
};
|
||||
|
||||
IIC: i2c@ef600500 {
|
||||
compatible = "ibm,iic-405gp", "ibm,iic";
|
||||
reg = <0xef600500 0x11>;
|
||||
interrupt-parent = <0x2>;
|
||||
interrupts = <0x2 0x4>;
|
||||
};
|
||||
|
||||
GPIO: gpio@ef600700 {
|
||||
compatible = "ibm,gpio-405gp";
|
||||
reg = <0xef600700 0x20>;
|
||||
};
|
||||
|
||||
EMAC: ethernet@ef600800 {
|
||||
device_type = "network";
|
||||
compatible = "ibm,emac-405gp", "ibm,emac";
|
||||
interrupt-parent = <0x2>;
|
||||
interrupts = <0xf 0x4 0x9 0x4>;
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
reg = <0xef600800 0x70>;
|
||||
mal-device = <0x3>;
|
||||
mal-tx-channel = <0x0>;
|
||||
mal-rx-channel = <0x0>;
|
||||
cell-index = <0x0>;
|
||||
max-frame-size = <0x5dc>;
|
||||
rx-fifo-size = <0x1000>;
|
||||
tx-fifo-size = <0x800>;
|
||||
phy-mode = "rmii";
|
||||
phy-map = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
EBC0: ebc {
|
||||
compatible = "ibm,ebc-405gp", "ibm,ebc";
|
||||
dcr-reg = <0x12 0x2>;
|
||||
#address-cells = <0x2>;
|
||||
#size-cells = <0x1>;
|
||||
clock-frequency = <0x0>; /* Filled in by U-Boot */
|
||||
|
||||
sram@0,0 {
|
||||
reg = <0x0 0x0 0x80000>;
|
||||
};
|
||||
|
||||
flash@0,80000 {
|
||||
compatible = "jedec-flash";
|
||||
bank-width = <0x1>;
|
||||
reg = <0x0 0x80000 0x80000>;
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
|
||||
partition@0 {
|
||||
label = "OpenBIOS";
|
||||
reg = <0x0 0x80000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
chosen {
|
||||
linux,stdout-path = "/plb/opb/serial@ef600300";
|
||||
};
|
||||
};
|
||||
@ -306,7 +306,7 @@
|
||||
localbus@fdf05000 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8560-localbus";
|
||||
compatible = "fsl,mpc8560-localbus", "simple-bus";
|
||||
reg = <0xfdf05000 0x68>;
|
||||
|
||||
ranges = <0x0 0x0 0xe0000000 0x00800000
|
||||
|
||||
@ -213,6 +213,15 @@
|
||||
linux,network-index = <2>;
|
||||
fsl,cpm-command = <0x16200300>;
|
||||
};
|
||||
|
||||
usb@11b60 {
|
||||
compatible = "fsl,mpc8272-cpm-usb";
|
||||
mode = "peripheral";
|
||||
reg = <0x11b60 0x40 0x8b00 0x100>;
|
||||
interrupts = <11 8>;
|
||||
interrupt-parent = <&PIC>;
|
||||
usb-clock = <5>;
|
||||
};
|
||||
};
|
||||
|
||||
cpm2_pio_c: gpio-controller@10d40 {
|
||||
|
||||
@ -147,6 +147,8 @@
|
||||
};
|
||||
|
||||
spi@f00 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
|
||||
reg = <0xf00 0x20>;
|
||||
interrupts = <2 13 0 2 14 0>;
|
||||
|
||||
@ -390,7 +390,8 @@
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,mpc8349e-localbus",
|
||||
"fsl,pq2pro-localbus";
|
||||
"fsl,pq2pro-localbus",
|
||||
"simple-bus";
|
||||
reg = <0xe0005000 0xd8>;
|
||||
ranges = <0x0 0x0 0xfe000000 0x1000000 /* flash */
|
||||
0x1 0x0 0xf8000000 0x20000 /* VSC 7385 */
|
||||
|
||||
@ -150,7 +150,7 @@
|
||||
};
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,p1022ds-pixis";
|
||||
compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
|
||||
reg = <3 0 0x30>;
|
||||
interrupt-parent = <&mpic>;
|
||||
/*
|
||||
|
||||
@ -118,6 +118,11 @@
|
||||
};
|
||||
};
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,p2020ds-fpga", "fsl,fpga-ngpixis";
|
||||
reg = <0x3 0x0 0x30>;
|
||||
};
|
||||
|
||||
nand@4,0 {
|
||||
compatible = "fsl,elbc-fcm-nand";
|
||||
reg = <0x4 0x0 0x40000>;
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* P2040RDB Device Tree Source
|
||||
* P2041RDB Device Tree Source
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
@ -32,11 +32,11 @@
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "p2040si.dtsi"
|
||||
/include/ "p2041si.dtsi"
|
||||
|
||||
/ {
|
||||
model = "fsl,P2040RDB";
|
||||
compatible = "fsl,P2040RDB";
|
||||
model = "fsl,P2041RDB";
|
||||
compatible = "fsl,P2041RDB";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
@ -45,6 +45,10 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
spi@110000 {
|
||||
flash@0 {
|
||||
@ -97,13 +101,8 @@
|
||||
};
|
||||
};
|
||||
|
||||
usb0: usb@210000 {
|
||||
phy_type = "utmi";
|
||||
};
|
||||
|
||||
usb1: usb@211000 {
|
||||
dr_mode = "host";
|
||||
phy_type = "utmi";
|
||||
};
|
||||
};
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* P2040 Silicon Device Tree Source
|
||||
* P2041 Silicon Device Tree Source
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
@ -35,13 +35,14 @@
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
compatible = "fsl,P2040";
|
||||
compatible = "fsl,P2041";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
@ -109,6 +110,74 @@
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,dcsr", "simple-bus";
|
||||
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,dcsr-epu";
|
||||
interrupts = <52 2 0 0
|
||||
84 2 0 0
|
||||
85 2 0 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,dcsr-npc";
|
||||
reg = <0x1000 0x1000 0x1000000 0x8000>;
|
||||
};
|
||||
dcsr-nxc@2000 {
|
||||
compatible = "fsl,dcsr-nxc";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
dcsr-corenet {
|
||||
compatible = "fsl,dcsr-corenet";
|
||||
reg = <0x8000 0x1000 0xB0000 0x1000>;
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@12000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal";
|
||||
reg = <0x18000 0x1000>;
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@40000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu0>;
|
||||
reg = <0x40000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@41000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x41000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@42000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu2>;
|
||||
reg = <0x42000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@43000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu3>;
|
||||
reg = <0x43000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -128,14 +197,14 @@
|
||||
fsl,num-laws = <32>;
|
||||
};
|
||||
|
||||
memory-controller@8000 {
|
||||
ddr: memory-controller@8000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <16 2 1 23>;
|
||||
};
|
||||
|
||||
cpc: l3-cache-controller@10000 {
|
||||
compatible = "fsl,p2040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
|
||||
compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
|
||||
reg = <0x10000 0x1000>;
|
||||
interrupts = <16 2 1 27>;
|
||||
};
|
||||
@ -226,7 +295,7 @@
|
||||
};
|
||||
|
||||
clockgen: global-utilities@e1000 {
|
||||
compatible = "fsl,p2040-clockgen", "fsl,qoriq-clockgen-1.0";
|
||||
compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
|
||||
reg = <0xe1000 0x1000>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
@ -238,45 +307,45 @@
|
||||
};
|
||||
|
||||
sfp: sfp@e8000 {
|
||||
compatible = "fsl,p2040-sfp", "fsl,qoriq-sfp-1.0";
|
||||
compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0";
|
||||
reg = <0xe8000 0x1000>;
|
||||
};
|
||||
|
||||
serdes: serdes@ea000 {
|
||||
compatible = "fsl,p2040-serdes";
|
||||
compatible = "fsl,p2041-serdes";
|
||||
reg = <0xea000 0x1000>;
|
||||
};
|
||||
|
||||
dma0: dma@100300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p2040-dma", "fsl,eloplus-dma";
|
||||
compatible = "fsl,p2041-dma", "fsl,eloplus-dma";
|
||||
reg = <0x100300 0x4>;
|
||||
ranges = <0x0 0x100100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,p2040-dma-channel",
|
||||
compatible = "fsl,p2041-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupts = <28 2 0 0>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,p2040-dma-channel",
|
||||
compatible = "fsl,p2041-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupts = <29 2 0 0>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,p2040-dma-channel",
|
||||
compatible = "fsl,p2041-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupts = <30 2 0 0>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,p2040-dma-channel",
|
||||
compatible = "fsl,p2041-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
@ -287,33 +356,33 @@
|
||||
dma1: dma@101300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p2040-dma", "fsl,eloplus-dma";
|
||||
compatible = "fsl,p2041-dma", "fsl,eloplus-dma";
|
||||
reg = <0x101300 0x4>;
|
||||
ranges = <0x0 0x101100 0x200>;
|
||||
cell-index = <1>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,p2040-dma-channel",
|
||||
compatible = "fsl,p2041-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupts = <32 2 0 0>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,p2040-dma-channel",
|
||||
compatible = "fsl,p2041-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupts = <33 2 0 0>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,p2040-dma-channel",
|
||||
compatible = "fsl,p2041-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupts = <34 2 0 0>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,p2040-dma-channel",
|
||||
compatible = "fsl,p2041-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
@ -324,22 +393,20 @@
|
||||
spi@110000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,p2040-espi", "fsl,mpc8536-espi";
|
||||
compatible = "fsl,p2041-espi", "fsl,mpc8536-espi";
|
||||
reg = <0x110000 0x1000>;
|
||||
interrupts = <53 0x2 0 0>;
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
|
||||
};
|
||||
|
||||
sdhc: sdhc@114000 {
|
||||
compatible = "fsl,p2040-esdhc", "fsl,esdhc";
|
||||
compatible = "fsl,p2041-esdhc", "fsl,esdhc";
|
||||
reg = <0x114000 0x1000>;
|
||||
interrupts = <48 2 0 0>;
|
||||
sdhci,auto-cmd12;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
|
||||
i2c@118000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
@ -417,7 +484,7 @@
|
||||
};
|
||||
|
||||
gpio0: gpio@130000 {
|
||||
compatible = "fsl,p2040-gpio", "fsl,qoriq-gpio";
|
||||
compatible = "fsl,p2041-gpio", "fsl,qoriq-gpio";
|
||||
reg = <0x130000 0x1000>;
|
||||
interrupts = <55 2 0 0>;
|
||||
#gpio-cells = <2>;
|
||||
@ -425,32 +492,34 @@
|
||||
};
|
||||
|
||||
usb0: usb@210000 {
|
||||
compatible = "fsl,p2040-usb2-mph",
|
||||
compatible = "fsl,p2041-usb2-mph",
|
||||
"fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x210000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <44 0x2 0 0>;
|
||||
phy_type = "utmi";
|
||||
port0;
|
||||
};
|
||||
|
||||
usb1: usb@211000 {
|
||||
compatible = "fsl,p2040-usb2-dr",
|
||||
compatible = "fsl,p2041-usb2-dr",
|
||||
"fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
|
||||
reg = <0x211000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <45 0x2 0 0>;
|
||||
phy_type = "utmi";
|
||||
};
|
||||
|
||||
sata@220000 {
|
||||
compatible = "fsl,p2040-sata", "fsl,pq-sata-v2";
|
||||
compatible = "fsl,p2041-sata", "fsl,pq-sata-v2";
|
||||
reg = <0x220000 0x1000>;
|
||||
interrupts = <68 0x2 0 0>;
|
||||
};
|
||||
|
||||
sata@221000 {
|
||||
compatible = "fsl,p2040-sata", "fsl,pq-sata-v2";
|
||||
compatible = "fsl,p2041-sata", "fsl,pq-sata-v2";
|
||||
reg = <0x221000 0x1000>;
|
||||
interrupts = <69 0x2 0 0>;
|
||||
};
|
||||
@ -534,19 +603,19 @@
|
||||
};
|
||||
|
||||
localbus@ffe124000 {
|
||||
compatible = "fsl,p2040-elbc", "fsl,elbc", "simple-bus";
|
||||
compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <25 2 0 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
pci0: pcie@ffe200000 {
|
||||
compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <0x1fca055>;
|
||||
clock-frequency = <33333333>;
|
||||
fsl,msi = <&msi0>;
|
||||
interrupts = <16 2 1 15>;
|
||||
pcie@0 {
|
||||
@ -568,12 +637,12 @@
|
||||
};
|
||||
|
||||
pci1: pcie@ffe201000 {
|
||||
compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 0xff>;
|
||||
clock-frequency = <0x1fca055>;
|
||||
clock-frequency = <33333333>;
|
||||
fsl,msi = <&msi1>;
|
||||
interrupts = <16 2 1 14>;
|
||||
pcie@0 {
|
||||
@ -595,12 +664,12 @@
|
||||
};
|
||||
|
||||
pci2: pcie@ffe202000 {
|
||||
compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <0x1fca055>;
|
||||
clock-frequency = <33333333>;
|
||||
fsl,msi = <&msi2>;
|
||||
interrupts = <16 2 1 13>;
|
||||
pcie@0 {
|
||||
@ -45,6 +45,10 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
spi@110000 {
|
||||
flash@0 {
|
||||
@ -147,8 +151,8 @@
|
||||
};
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,p3041ds-pixis";
|
||||
reg = <3 0 0x20>;
|
||||
compatible = "fsl,p3041ds-fpga", "fsl,fpga-ngpixis";
|
||||
reg = <3 0 0x30>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -42,6 +42,7 @@
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
@ -114,6 +115,74 @@
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,dcsr", "simple-bus";
|
||||
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,dcsr-epu";
|
||||
interrupts = <52 2 0 0
|
||||
84 2 0 0
|
||||
85 2 0 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,dcsr-npc";
|
||||
reg = <0x1000 0x1000 0x1000000 0x8000>;
|
||||
};
|
||||
dcsr-nxc@2000 {
|
||||
compatible = "fsl,dcsr-nxc";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
dcsr-corenet {
|
||||
compatible = "fsl,dcsr-corenet";
|
||||
reg = <0x8000 0x1000 0xB0000 0x1000>;
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,p43041-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,p43041-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@12000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,p43041-dcsr-nal", "fsl,dcsr-nal";
|
||||
reg = <0x18000 0x1000>;
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,p43041-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@40000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu0>;
|
||||
reg = <0x40000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@41000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x41000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@42000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu2>;
|
||||
reg = <0x42000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@43000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu3>;
|
||||
reg = <0x43000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -133,7 +202,7 @@
|
||||
fsl,num-laws = <32>;
|
||||
};
|
||||
|
||||
memory-controller@8000 {
|
||||
ddr: memory-controller@8000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <16 2 1 23>;
|
||||
|
||||
238
arch/powerpc/boot/dts/p3060qds.dts
Normal file
238
arch/powerpc/boot/dts/p3060qds.dts
Normal file
@ -0,0 +1,238 @@
|
||||
/*
|
||||
* P3060QDS Device Tree Source
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "p3060si.dtsi"
|
||||
|
||||
/ {
|
||||
model = "fsl,P3060QDS";
|
||||
compatible = "fsl,P3060QDS";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
spi@110000 {
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,s25sl12801";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>; /* input clock */
|
||||
partition@u-boot {
|
||||
label = "u-boot";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@kernel {
|
||||
label = "kernel";
|
||||
reg = <0x00100000 0x00500000>;
|
||||
read-only;
|
||||
};
|
||||
partition@dtb {
|
||||
label = "dtb";
|
||||
reg = <0x00600000 0x00100000>;
|
||||
read-only;
|
||||
};
|
||||
partition@fs {
|
||||
label = "file system";
|
||||
reg = <0x00700000 0x00900000>;
|
||||
};
|
||||
};
|
||||
flash@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,en25q32b";
|
||||
reg = <1>;
|
||||
spi-max-frequency = <40000000>; /* input clock */
|
||||
partition@spi1 {
|
||||
label = "spi1";
|
||||
reg = <0x00000000 0x00400000>;
|
||||
};
|
||||
};
|
||||
flash@2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "atmel,at45db081d";
|
||||
reg = <2>;
|
||||
spi-max-frequency = <40000000>; /* input clock */
|
||||
partition@spi1 {
|
||||
label = "spi2";
|
||||
reg = <0x00000000 0x00100000>;
|
||||
};
|
||||
};
|
||||
flash@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "spansion,sst25wf040";
|
||||
reg = <3>;
|
||||
spi-max-frequency = <40000000>; /* input clock */
|
||||
partition@spi3 {
|
||||
label = "spi3";
|
||||
reg = <0x00000000 0x00080000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c@118000 {
|
||||
eeprom@51 {
|
||||
compatible = "at24,24c256";
|
||||
reg = <0x51>;
|
||||
};
|
||||
eeprom@53 {
|
||||
compatible = "at24,24c256";
|
||||
reg = <0x53>;
|
||||
};
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds3232";
|
||||
reg = <0x68>;
|
||||
interrupts = <0x1 0x1 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
usb0: usb@210000 {
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
usb1: usb@211000 {
|
||||
dr_mode = "host";
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
};
|
||||
|
||||
rapidio@ffe0c0000 {
|
||||
reg = <0xf 0xfe0c0000 0 0x11000>;
|
||||
|
||||
port1 {
|
||||
ranges = <0 0 0xc 0x20000000 0 0x10000000>;
|
||||
};
|
||||
port2 {
|
||||
ranges = <0 0 0xc 0x30000000 0 0x10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
localbus@ffe124000 {
|
||||
reg = <0xf 0xfe124000 0 0x1000>;
|
||||
ranges = <0 0 0xf 0xe8000000 0x08000000
|
||||
2 0 0xf 0xffa00000 0x00040000
|
||||
3 0 0xf 0xffdf0000 0x00008000>;
|
||||
|
||||
flash@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0 0 0x08000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <2>;
|
||||
};
|
||||
|
||||
nand@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,elbc-fcm-nand";
|
||||
reg = <0x2 0x0 0x40000>;
|
||||
|
||||
partition@0 {
|
||||
label = "NAND U-Boot Image";
|
||||
reg = <0x0 0x02000000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@2000000 {
|
||||
label = "NAND Root File System";
|
||||
reg = <0x02000000 0x10000000>;
|
||||
};
|
||||
|
||||
partition@12000000 {
|
||||
label = "NAND Compressed RFS Image";
|
||||
reg = <0x12000000 0x08000000>;
|
||||
};
|
||||
|
||||
partition@1a000000 {
|
||||
label = "NAND Linux Kernel Image";
|
||||
reg = <0x1a000000 0x04000000>;
|
||||
};
|
||||
|
||||
partition@1e000000 {
|
||||
label = "NAND DTB Image";
|
||||
reg = <0x1e000000 0x01000000>;
|
||||
};
|
||||
|
||||
partition@1f000000 {
|
||||
label = "NAND Writable User area";
|
||||
reg = <0x1f000000 0x21000000>;
|
||||
};
|
||||
};
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,p3060qds-fpga", "fsl,fpga-qixis";
|
||||
reg = <3 0 0x100>;
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@ffe200000 {
|
||||
reg = <0xf 0xfe200000 0 0x1000>;
|
||||
ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
|
||||
0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
|
||||
pcie@0 {
|
||||
ranges = <0x02000000 0 0xe0000000
|
||||
0x02000000 0 0xe0000000
|
||||
0 0x20000000
|
||||
|
||||
0x01000000 0 0x00000000
|
||||
0x01000000 0 0x00000000
|
||||
0 0x00010000>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@ffe201000 {
|
||||
reg = <0xf 0xfe201000 0 0x1000>;
|
||||
ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
|
||||
0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
|
||||
pcie@0 {
|
||||
ranges = <0x02000000 0 0xe0000000
|
||||
0x02000000 0 0xe0000000
|
||||
0 0x20000000
|
||||
|
||||
0x01000000 0 0x00000000
|
||||
0x01000000 0 0x00000000
|
||||
0 0x00010000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
719
arch/powerpc/boot/dts/p3060si.dtsi
Normal file
719
arch/powerpc/boot/dts/p3060si.dtsi
Normal file
@ -0,0 +1,719 @@
|
||||
/*
|
||||
* P3060 Silicon Device Tree Source
|
||||
*
|
||||
* Copyright 2011 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
compatible = "fsl,P3060";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
serial2 = &serial2;
|
||||
serial3 = &serial3;
|
||||
pci0 = &pci0;
|
||||
pci1 = &pci1;
|
||||
usb0 = &usb0;
|
||||
usb1 = &usb1;
|
||||
dma0 = &dma0;
|
||||
dma1 = &dma1;
|
||||
msi0 = &msi0;
|
||||
msi1 = &msi1;
|
||||
msi2 = &msi2;
|
||||
|
||||
crypto = &crypto;
|
||||
sec_jr0 = &sec_jr0;
|
||||
sec_jr1 = &sec_jr1;
|
||||
sec_jr2 = &sec_jr2;
|
||||
sec_jr3 = &sec_jr3;
|
||||
rtic_a = &rtic_a;
|
||||
rtic_b = &rtic_b;
|
||||
rtic_c = &rtic_c;
|
||||
rtic_d = &rtic_d;
|
||||
sec_mon = &sec_mon;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: PowerPC,e500mc@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2_0>;
|
||||
L2_0: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu1: PowerPC,e500mc@1 {
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
next-level-cache = <&L2_1>;
|
||||
L2_1: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu4: PowerPC,e500mc@4 {
|
||||
device_type = "cpu";
|
||||
reg = <4>;
|
||||
next-level-cache = <&L2_4>;
|
||||
L2_4: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu5: PowerPC,e500mc@5 {
|
||||
device_type = "cpu";
|
||||
reg = <5>;
|
||||
next-level-cache = <&L2_5>;
|
||||
L2_5: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu6: PowerPC,e500mc@6 {
|
||||
device_type = "cpu";
|
||||
reg = <6>;
|
||||
next-level-cache = <&L2_6>;
|
||||
L2_6: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu7: PowerPC,e500mc@7 {
|
||||
device_type = "cpu";
|
||||
reg = <7>;
|
||||
next-level-cache = <&L2_7>;
|
||||
L2_7: l2-cache {
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,dcsr", "simple-bus";
|
||||
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,dcsr-epu";
|
||||
interrupts = <52 2 0 0
|
||||
84 2 0 0
|
||||
85 2 0 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,dcsr-npc";
|
||||
reg = <0x1000 0x1000 0x1000000 0x8000>;
|
||||
};
|
||||
dcsr-nxc@2000 {
|
||||
compatible = "fsl,dcsr-nxc";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
dcsr-corenet {
|
||||
compatible = "fsl,dcsr-corenet";
|
||||
reg = <0x8000 0x1000 0xB0000 0x1000>;
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@12000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal";
|
||||
reg = <0x18000 0x1000>;
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@40000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu0>;
|
||||
reg = <0x40000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@41000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x41000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@44000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu4>;
|
||||
reg = <0x44000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@45000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu5>;
|
||||
reg = <0x45000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@46000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu6>;
|
||||
reg = <0x46000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@47000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu7>;
|
||||
reg = <0x47000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
|
||||
soc-sram-error {
|
||||
compatible = "fsl,soc-sram-error";
|
||||
interrupts = <16 2 1 29>;
|
||||
};
|
||||
|
||||
corenet-law@0 {
|
||||
compatible = "fsl,corenet-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <32>;
|
||||
};
|
||||
|
||||
ddr: memory-controller@8000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <16 2 1 23>;
|
||||
};
|
||||
|
||||
cpc: l3-cache-controller@10000 {
|
||||
compatible = "fsl,p3060-l3-cache-controller", "cache";
|
||||
reg = <0x10000 0x1000
|
||||
0x11000 0x1000>;
|
||||
interrupts = <16 2 1 27>;
|
||||
};
|
||||
|
||||
corenet-cf@18000 {
|
||||
compatible = "fsl,corenet-cf";
|
||||
reg = <0x18000 0x1000>;
|
||||
interrupts = <16 2 1 31>;
|
||||
fsl,ccf-num-csdids = <32>;
|
||||
fsl,ccf-num-snoopids = <32>;
|
||||
};
|
||||
|
||||
iommu@20000 {
|
||||
compatible = "fsl,pamu-v1.0", "fsl,pamu";
|
||||
reg = <0x20000 0x5000>;
|
||||
interrupts = <
|
||||
24 2 0 0
|
||||
16 2 1 30>;
|
||||
};
|
||||
|
||||
mpic: pic@40000 {
|
||||
clock-frequency = <0>;
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <4>;
|
||||
reg = <0x40000 0x40000>;
|
||||
compatible = "fsl,mpic", "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
};
|
||||
|
||||
msi0: msi@41600 {
|
||||
compatible = "fsl,mpic-msi";
|
||||
reg = <0x41600 0x200>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe0 0 0 0
|
||||
0xe1 0 0 0
|
||||
0xe2 0 0 0
|
||||
0xe3 0 0 0
|
||||
0xe4 0 0 0
|
||||
0xe5 0 0 0
|
||||
0xe6 0 0 0
|
||||
0xe7 0 0 0>;
|
||||
};
|
||||
|
||||
msi1: msi@41800 {
|
||||
compatible = "fsl,mpic-msi";
|
||||
reg = <0x41800 0x200>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xe8 0 0 0
|
||||
0xe9 0 0 0
|
||||
0xea 0 0 0
|
||||
0xeb 0 0 0
|
||||
0xec 0 0 0
|
||||
0xed 0 0 0
|
||||
0xee 0 0 0
|
||||
0xef 0 0 0>;
|
||||
};
|
||||
|
||||
msi2: msi@41a00 {
|
||||
compatible = "fsl,mpic-msi";
|
||||
reg = <0x41a00 0x200>;
|
||||
msi-available-ranges = <0 0x100>;
|
||||
interrupts = <
|
||||
0xf0 0 0 0
|
||||
0xf1 0 0 0
|
||||
0xf2 0 0 0
|
||||
0xf3 0 0 0
|
||||
0xf4 0 0 0
|
||||
0xf5 0 0 0
|
||||
0xf6 0 0 0
|
||||
0xf7 0 0 0>;
|
||||
};
|
||||
|
||||
rmu: rmu@d3000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,srio-rmu";
|
||||
reg = <0xd3000 0x500>;
|
||||
ranges = <0x0 0xd3000 0x500>;
|
||||
|
||||
message-unit@0 {
|
||||
compatible = "fsl,srio-msg-unit";
|
||||
reg = <0x0 0x100>;
|
||||
interrupts = <
|
||||
60 2 0 0 /* msg1_tx_irq */
|
||||
61 2 0 0>;/* msg1_rx_irq */
|
||||
};
|
||||
message-unit@100 {
|
||||
compatible = "fsl,srio-msg-unit";
|
||||
reg = <0x100 0x100>;
|
||||
interrupts = <
|
||||
62 2 0 0 /* msg2_tx_irq */
|
||||
63 2 0 0>;/* msg2_rx_irq */
|
||||
};
|
||||
doorbell-unit@400 {
|
||||
compatible = "fsl,srio-dbell-unit";
|
||||
reg = <0x400 0x80>;
|
||||
interrupts = <
|
||||
56 2 0 0 /* bell_outb_irq */
|
||||
57 2 0 0>;/* bell_inb_irq */
|
||||
};
|
||||
port-write-unit@4e0 {
|
||||
compatible = "fsl,srio-port-write-unit";
|
||||
reg = <0x4e0 0x20>;
|
||||
interrupts = <16 2 1 11>;
|
||||
};
|
||||
};
|
||||
|
||||
guts: global-utilities@e0000 {
|
||||
compatible = "fsl,qoriq-device-config-1.0";
|
||||
reg = <0xe0000 0xe00>;
|
||||
fsl,has-rstcr;
|
||||
#sleep-cells = <1>;
|
||||
fsl,liodn-bits = <12>;
|
||||
};
|
||||
|
||||
pins: global-utilities@e0e00 {
|
||||
compatible = "fsl,qoriq-pin-control-1.0";
|
||||
reg = <0xe0e00 0x200>;
|
||||
#sleep-cells = <2>;
|
||||
};
|
||||
|
||||
clockgen: global-utilities@e1000 {
|
||||
compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0";
|
||||
reg = <0xe1000 0x1000>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
rcpm: global-utilities@e2000 {
|
||||
compatible = "fsl,qoriq-rcpm-1.0";
|
||||
reg = <0xe2000 0x1000>;
|
||||
#sleep-cells = <1>;
|
||||
};
|
||||
|
||||
sfp: sfp@e8000 {
|
||||
compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0";
|
||||
reg = <0xe8000 0x1000>;
|
||||
};
|
||||
|
||||
serdes: serdes@ea000 {
|
||||
compatible = "fsl,p3060-serdes";
|
||||
reg = <0xea000 0x1000>;
|
||||
};
|
||||
|
||||
dma0: dma@100300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p3060-dma", "fsl,eloplus-dma";
|
||||
reg = <0x100300 0x4>;
|
||||
ranges = <0x0 0x100100 0x200>;
|
||||
cell-index = <0>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,p3060-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupts = <28 2 0 0>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,p3060-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupts = <29 2 0 0>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,p3060-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupts = <30 2 0 0>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,p3060-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupts = <31 2 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
dma1: dma@101300 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,p3060-dma", "fsl,eloplus-dma";
|
||||
reg = <0x101300 0x4>;
|
||||
ranges = <0x0 0x101100 0x200>;
|
||||
cell-index = <1>;
|
||||
dma-channel@0 {
|
||||
compatible = "fsl,p3060-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x0 0x80>;
|
||||
cell-index = <0>;
|
||||
interrupts = <32 2 0 0>;
|
||||
};
|
||||
dma-channel@80 {
|
||||
compatible = "fsl,p3060-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x80 0x80>;
|
||||
cell-index = <1>;
|
||||
interrupts = <33 2 0 0>;
|
||||
};
|
||||
dma-channel@100 {
|
||||
compatible = "fsl,p3060-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x100 0x80>;
|
||||
cell-index = <2>;
|
||||
interrupts = <34 2 0 0>;
|
||||
};
|
||||
dma-channel@180 {
|
||||
compatible = "fsl,p3060-dma-channel",
|
||||
"fsl,eloplus-dma-channel";
|
||||
reg = <0x180 0x80>;
|
||||
cell-index = <3>;
|
||||
interrupts = <35 2 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
spi@110000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,p3060-espi", "fsl,mpc8536-espi";
|
||||
reg = <0x110000 0x1000>;
|
||||
interrupts = <53 0x2 0 0>;
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
i2c@118000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <0>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x118000 0x100>;
|
||||
interrupts = <38 2 0 0>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@118100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <1>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x118100 0x100>;
|
||||
interrupts = <38 2 0 0>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@119000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <2>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x119000 0x100>;
|
||||
interrupts = <39 2 0 0>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@119100 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cell-index = <3>;
|
||||
compatible = "fsl-i2c";
|
||||
reg = <0x119100 0x100>;
|
||||
interrupts = <39 2 0 0>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
serial0: serial@11c500 {
|
||||
cell-index = <0>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x11c500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <36 2 0 0>;
|
||||
};
|
||||
|
||||
serial1: serial@11c600 {
|
||||
cell-index = <1>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x11c600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <36 2 0 0>;
|
||||
};
|
||||
|
||||
serial2: serial@11d500 {
|
||||
cell-index = <2>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x11d500 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <37 2 0 0>;
|
||||
};
|
||||
|
||||
serial3: serial@11d600 {
|
||||
cell-index = <3>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <0x11d600 0x100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <37 2 0 0>;
|
||||
};
|
||||
|
||||
gpio0: gpio@130000 {
|
||||
compatible = "fsl,p3060-gpio", "fsl,qoriq-gpio";
|
||||
reg = <0x130000 0x1000>;
|
||||
interrupts = <55 2 0 0>;
|
||||
#gpio-cells = <2>;
|
||||
gpio-controller;
|
||||
};
|
||||
|
||||
usb0: usb@210000 {
|
||||
compatible = "fsl,p3060-usb2-mph",
|
||||
"fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
|
||||
reg = <0x210000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <44 0x2 0 0>;
|
||||
};
|
||||
|
||||
usb1: usb@211000 {
|
||||
compatible = "fsl,p3060-usb2-dr",
|
||||
"fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
|
||||
reg = <0x211000 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <45 0x2 0 0>;
|
||||
};
|
||||
|
||||
crypto: crypto@300000 {
|
||||
compatible = "fsl,sec-v4.1", "fsl,sec-v4.0";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x300000 0x10000>;
|
||||
ranges = <0 0x300000 0x10000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <92 2 0 0>;
|
||||
|
||||
sec_jr0: jr@1000 {
|
||||
compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <88 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr1: jr@2000 {
|
||||
compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x2000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <89 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr2: jr@3000 {
|
||||
compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x3000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <90 2 0 0>;
|
||||
};
|
||||
|
||||
sec_jr3: jr@4000 {
|
||||
compatible = "fsl,sec-v4.1-job-ring", "fsl,sec-v4.0-job-ring";
|
||||
reg = <0x4000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <91 2 0 0>;
|
||||
};
|
||||
|
||||
rtic@6000 {
|
||||
compatible = "fsl,sec-v4.1-rtic", "fsl,sec-v4.0-rtic";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x6000 0x100>;
|
||||
ranges = <0x0 0x6100 0xe00>;
|
||||
|
||||
rtic_a: rtic-a@0 {
|
||||
compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x00 0x20 0x100 0x80>;
|
||||
};
|
||||
|
||||
rtic_b: rtic-b@20 {
|
||||
compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x20 0x20 0x200 0x80>;
|
||||
};
|
||||
|
||||
rtic_c: rtic-c@40 {
|
||||
compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x40 0x20 0x300 0x80>;
|
||||
};
|
||||
|
||||
rtic_d: rtic-d@60 {
|
||||
compatible = "fsl,sec-v4.1-rtic-memory", "fsl,sec-v4.0-rtic-memory";
|
||||
reg = <0x60 0x20 0x500 0x80>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
sec_mon: sec_mon@314000 {
|
||||
compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon";
|
||||
reg = <0x314000 0x1000>;
|
||||
interrupt-parent = <&mpic>;
|
||||
interrupts = <93 2 0 0>;
|
||||
};
|
||||
};
|
||||
|
||||
rapidio@ffe0c0000 {
|
||||
compatible = "fsl,srio";
|
||||
interrupts = <16 2 1 11>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
fsl,srio-rmu-handle = <&rmu>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <1>;
|
||||
};
|
||||
|
||||
port2 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
localbus@ffe124000 {
|
||||
compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus";
|
||||
interrupts = <25 2 0 0>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
};
|
||||
|
||||
pci0: pcie@ffe200000 {
|
||||
compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
fsl,msi = <&msi0>;
|
||||
interrupts = <16 2 1 15>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 15>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 40 1 0 0
|
||||
0000 0 0 2 &mpic 1 1 0 0
|
||||
0000 0 0 3 &mpic 2 1 0 0
|
||||
0000 0 0 4 &mpic 3 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
pci1: pcie@ffe201000 {
|
||||
compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0 0xff>;
|
||||
clock-frequency = <33333333>;
|
||||
fsl,msi = <&msi1>;
|
||||
interrupts = <16 2 1 14>;
|
||||
pcie@0 {
|
||||
reg = <0 0 0 0 0>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
interrupts = <16 2 1 14>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 41 1 0 0
|
||||
0000 0 0 2 &mpic 5 1 0 0
|
||||
0000 0 0 3 &mpic 6 1 0 0
|
||||
0000 0 0 4 &mpic 7 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -45,6 +45,10 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
spi@110000 {
|
||||
flash@0 {
|
||||
@ -108,7 +112,8 @@
|
||||
|
||||
localbus@ffe124000 {
|
||||
reg = <0xf 0xfe124000 0 0x1000>;
|
||||
ranges = <0 0 0xf 0xe8000000 0x08000000>;
|
||||
ranges = <0 0 0xf 0xe8000000 0x08000000
|
||||
3 0 0xf 0xffdf0000 0x00008000>;
|
||||
|
||||
flash@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
@ -116,6 +121,11 @@
|
||||
bank-width = <2>;
|
||||
device-width = <2>;
|
||||
};
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,p4080ds-fpga", "fsl,fpga-ngpixis";
|
||||
reg = <3 0 0x30>;
|
||||
};
|
||||
};
|
||||
|
||||
pci0: pcie@ffe200000 {
|
||||
|
||||
@ -42,6 +42,7 @@
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
@ -77,7 +78,7 @@
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: PowerPC,4080@0 {
|
||||
cpu0: PowerPC,e500mc@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2_0>;
|
||||
@ -85,7 +86,7 @@
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu1: PowerPC,4080@1 {
|
||||
cpu1: PowerPC,e500mc@1 {
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
next-level-cache = <&L2_1>;
|
||||
@ -93,7 +94,7 @@
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu2: PowerPC,4080@2 {
|
||||
cpu2: PowerPC,e500mc@2 {
|
||||
device_type = "cpu";
|
||||
reg = <2>;
|
||||
next-level-cache = <&L2_2>;
|
||||
@ -101,7 +102,7 @@
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu3: PowerPC,4080@3 {
|
||||
cpu3: PowerPC,e500mc@3 {
|
||||
device_type = "cpu";
|
||||
reg = <3>;
|
||||
next-level-cache = <&L2_3>;
|
||||
@ -109,7 +110,7 @@
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu4: PowerPC,4080@4 {
|
||||
cpu4: PowerPC,e500mc@4 {
|
||||
device_type = "cpu";
|
||||
reg = <4>;
|
||||
next-level-cache = <&L2_4>;
|
||||
@ -117,7 +118,7 @@
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu5: PowerPC,4080@5 {
|
||||
cpu5: PowerPC,e500mc@5 {
|
||||
device_type = "cpu";
|
||||
reg = <5>;
|
||||
next-level-cache = <&L2_5>;
|
||||
@ -125,7 +126,7 @@
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu6: PowerPC,4080@6 {
|
||||
cpu6: PowerPC,e500mc@6 {
|
||||
device_type = "cpu";
|
||||
reg = <6>;
|
||||
next-level-cache = <&L2_6>;
|
||||
@ -133,7 +134,7 @@
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
cpu7: PowerPC,4080@7 {
|
||||
cpu7: PowerPC,e500mc@7 {
|
||||
device_type = "cpu";
|
||||
reg = <7>;
|
||||
next-level-cache = <&L2_7>;
|
||||
@ -143,6 +144,99 @@
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,dcsr", "simple-bus";
|
||||
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,dcsr-epu";
|
||||
interrupts = <52 2 0 0
|
||||
84 2 0 0
|
||||
85 2 0 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,dcsr-npc";
|
||||
reg = <0x1000 0x1000 0x1000000 0x8000>;
|
||||
};
|
||||
dcsr-nxc@2000 {
|
||||
compatible = "fsl,dcsr-nxc";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
dcsr-corenet {
|
||||
compatible = "fsl,dcsr-corenet";
|
||||
reg = <0x8000 0x1000 0xB0000 0x1000>;
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@12000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr1>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@13000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr2>;
|
||||
reg = <0x13000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
|
||||
reg = <0x18000 0x1000>;
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@40000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu0>;
|
||||
reg = <0x40000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@41000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x41000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@42000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu2>;
|
||||
reg = <0x42000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@43000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu3>;
|
||||
reg = <0x43000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@44000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu4>;
|
||||
reg = <0x44000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@45000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu5>;
|
||||
reg = <0x45000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@46000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu6>;
|
||||
reg = <0x46000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@47000 {
|
||||
compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu7>;
|
||||
reg = <0x47000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -162,13 +256,13 @@
|
||||
fsl,num-laws = <32>;
|
||||
};
|
||||
|
||||
memory-controller@8000 {
|
||||
ddr1: memory-controller@8000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <16 2 1 23>;
|
||||
};
|
||||
|
||||
memory-controller@9000 {
|
||||
ddr2: memory-controller@9000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
|
||||
reg = <0x9000 0x1000>;
|
||||
interrupts = <16 2 1 22>;
|
||||
|
||||
@ -45,6 +45,10 @@
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01008000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
spi@110000 {
|
||||
flash@0 {
|
||||
@ -147,8 +151,8 @@
|
||||
};
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,p5020ds-pixis";
|
||||
reg = <3 0 0x20>;
|
||||
compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis";
|
||||
reg = <3 0 0x30>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -42,6 +42,7 @@
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
@ -98,6 +99,69 @@
|
||||
};
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,dcsr", "simple-bus";
|
||||
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,dcsr-epu";
|
||||
interrupts = <52 2 0 0
|
||||
84 2 0 0
|
||||
85 2 0 0>;
|
||||
interrupt-parent = <&mpic>;
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,dcsr-npc";
|
||||
reg = <0x1000 0x1000 0x1000000 0x8000>;
|
||||
};
|
||||
dcsr-nxc@2000 {
|
||||
compatible = "fsl,dcsr-nxc";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
dcsr-corenet {
|
||||
compatible = "fsl,dcsr-corenet";
|
||||
reg = <0x8000 0x1000 0xB0000 0x1000>;
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,p5020-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,p5020-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@12000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr1>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@13000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr2>;
|
||||
reg = <0x13000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,p5020-dcsr-nal", "fsl,dcsr-nal";
|
||||
reg = <0x18000 0x1000>;
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,p5020-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@40000 {
|
||||
compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu0>;
|
||||
reg = <0x40000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@41000 {
|
||||
compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x41000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@ -117,13 +181,13 @@
|
||||
fsl,num-laws = <32>;
|
||||
};
|
||||
|
||||
memory-controller@8000 {
|
||||
ddr1: memory-controller@8000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <16 2 1 23>;
|
||||
};
|
||||
|
||||
memory-controller@9000 {
|
||||
ddr2: memory-controller@9000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
|
||||
reg = <0x9000 0x1000>;
|
||||
interrupts = <16 2 1 22>;
|
||||
|
||||
@ -331,7 +331,7 @@
|
||||
};
|
||||
|
||||
localbus@ff705000 {
|
||||
compatible = "fsl,mpc8560-localbus";
|
||||
compatible = "fsl,mpc8560-localbus", "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xff705000 0x100>; // BRx, ORx, etc.
|
||||
|
||||
@ -138,6 +138,42 @@
|
||||
clock-frequency = <0>; /* Filled in by zImage */
|
||||
interrupts = <0x5 0x1>;
|
||||
interrupt-parent = <&UIC1>;
|
||||
|
||||
nor_flash@0,0 {
|
||||
compatible = "amd,s29gl256n", "cfi-flash";
|
||||
bank-width = <2>;
|
||||
reg = <0x00000000 0x00000000 0x04000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
partition@0 {
|
||||
label = "kernel";
|
||||
reg = <0x00000000 0x001e0000>;
|
||||
};
|
||||
partition@1e0000 {
|
||||
label = "dtb";
|
||||
reg = <0x001e0000 0x00020000>;
|
||||
};
|
||||
partition@200000 {
|
||||
label = "ramdisk";
|
||||
reg = <0x00200000 0x01400000>;
|
||||
};
|
||||
partition@1600000 {
|
||||
label = "jffs2";
|
||||
reg = <0x01600000 0x00400000>;
|
||||
};
|
||||
partition@1a00000 {
|
||||
label = "user";
|
||||
reg = <0x01a00000 0x02540000>;
|
||||
};
|
||||
partition@3f40000 {
|
||||
label = "env";
|
||||
reg = <0x03f40000 0x00040000>;
|
||||
};
|
||||
partition@3f80000 {
|
||||
label = "u-boot";
|
||||
reg = <0x03f80000 0x00080000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
UART0: serial@ef600300 {
|
||||
|
||||
Reference in New Issue
Block a user