x86, msr: Add rd/wrmsr interfaces with preset registers

native_{rdmsr,wrmsr}_safe_regs are two new interfaces which allow
presetting of a subset of eight x86 GPRs before executing the rd/wrmsr
instructions. This is needed at least on AMD K8 for accessing an erratum
workaround MSR.

Originally based on an idea by H. Peter Anvin.

Signed-off-by: Borislav Petkov <petkovbb@gmail.com>
LKML-Reference: <1251705011-18636-1-git-send-email-petkovbb@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
Borislav Petkov
2009-08-31 09:50:09 +02:00
committed by H. Peter Anvin
parent 366d19e181
commit 132ec92f3f
5 changed files with 130 additions and 0 deletions

View File

@@ -113,6 +113,9 @@ notrace static inline int native_write_msr_safe(unsigned int msr,
extern unsigned long long native_read_tsc(void);
extern int native_rdmsr_safe_regs(u32 *regs);
extern int native_wrmsr_safe_regs(u32 *regs);
static __always_inline unsigned long long __native_read_tsc(void)
{
DECLARE_ARGS(val, low, high);
@@ -189,6 +192,16 @@ static inline int rdmsrl_amd_safe(unsigned msr, unsigned long long *p)
return err;
}
static inline int rdmsr_safe_regs(u32 *regs)
{
return native_rdmsr_safe_regs(regs);
}
static inline int wrmsr_safe_regs(u32 *regs)
{
return native_wrmsr_safe_regs(regs);
}
#define rdtscl(low) \
((low) = (u32)__native_read_tsc())