[ALSA] emu10k1 - EMU 1212 with 16 capture channels
* adding 8 more 32-bit capture channels (total of 16) for emu1010 cards * adding some code comments and card details description Signed-off-by: Pavel Hofman <dustin@seznam.cz> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
This commit is contained in:
committed by
Jaroslav Kysela
parent
15cc4458c5
commit
13d457094b
@@ -694,6 +694,37 @@ static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * file
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return 0;
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}
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/*
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* EMU-1010 - details found out from this driver, official MS Win drivers,
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* testing the card:
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*
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* Audigy2 (aka Alice2):
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* ---------------------
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* * communication over PCI
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* * conversion of 32-bit data coming over EMU32 links from HANA FPGA
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* to 2 x 16-bit, using internal DSP instructions
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* * slave mode, clock supplied by HANA
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* * linked to HANA using:
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* 32 x 32-bit serial EMU32 output channels
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* 16 x EMU32 input channels
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* (?) x I2S I/O channels (?)
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*
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* FPGA (aka HANA):
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* ---------------
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* * provides all (?) physical inputs and outputs of the card
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* (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
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* * provides clock signal for the card and Alice2
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* * two crystals - for 44.1kHz and 48kHz multiples
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* * provides internal routing of signal sources to signal destinations
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* * inputs/outputs to Alice2 - see above
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*
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* Current status of the driver:
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* ----------------------------
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* * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
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* * PCM device nb. 2:
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* 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
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* 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
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*/
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static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
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{
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unsigned int i;
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@@ -850,6 +881,27 @@ static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
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EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
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snd_emu1010_fpga_link_dst_src_write(emu,
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EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
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/* Pavel Hofman - setting defaults for 8 more capture channels
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* Defaults only, users will set their own values anyways, let's
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* just copy/paste.
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*/
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snd_emu1010_fpga_link_dst_src_write(emu,
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EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
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snd_emu1010_fpga_link_dst_src_write(emu,
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EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
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snd_emu1010_fpga_link_dst_src_write(emu,
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EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
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snd_emu1010_fpga_link_dst_src_write(emu,
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EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
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snd_emu1010_fpga_link_dst_src_write(emu,
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EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
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snd_emu1010_fpga_link_dst_src_write(emu,
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EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
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snd_emu1010_fpga_link_dst_src_write(emu,
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EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
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snd_emu1010_fpga_link_dst_src_write(emu,
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EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
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#endif
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#if 0
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/* Original */
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