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bnx2x: Fix Parallel-Detect settings

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Enable Parallel-Detect for 10G and 1G only if the relevant speed
capability is enabled

Signed-off-by: Yaniv Rosner <yanivr@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Yaniv Rosner
2009-11-05 19:18:04 +02:00
committed by David S. Miller
parent 6a2a2d6bf8
commit 18afb0a6fa
1 changed files with 9 additions and 6 deletions
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13
drivers/net/bnx2x_link.c
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@@ -1107,18 +1107,21 @@ static void bnx2x_set_parallel_detection(struct link_params *params,
MDIO_REG_BANK_SERDES_DIGITAL, MDIO_REG_BANK_SERDES_DIGITAL,
MDIO_SERDES_DIGITAL_A_1000X_CONTROL2, MDIO_SERDES_DIGITAL_A_1000X_CONTROL2,
&control2); &control2);
if (params->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)
control2 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN; control2 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN;
else
control2 &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN;
DP(NETIF_MSG_LINK, "params->speed_cap_mask = 0x%x, control2 = 0x%x\n",
params->speed_cap_mask, control2);
CL45_WR_OVER_CL22(bp, params->port, CL45_WR_OVER_CL22(bp, params->port,
params->phy_addr, params->phy_addr,
MDIO_REG_BANK_SERDES_DIGITAL, MDIO_REG_BANK_SERDES_DIGITAL,
MDIO_SERDES_DIGITAL_A_1000X_CONTROL2, MDIO_SERDES_DIGITAL_A_1000X_CONTROL2,
control2); control2);
if (phy_flags & PHY_XGXS_FLAG) { if ((phy_flags & PHY_XGXS_FLAG) &&
(params->speed_cap_mask &
PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) {
DP(NETIF_MSG_LINK, "XGXS\n"); DP(NETIF_MSG_LINK, "XGXS\n");
CL45_WR_OVER_CL22(bp, params->port, CL45_WR_OVER_CL22(bp, params->port,