drm/nouveau/pm: track mr2 for gddr3
There's some "extended" GDDR3 chipsets out there with EMRS2 settings that change the layout of MRS/EMRS1 bitmaps.. Sigh.. Still need to track down how exactly we're supposed to handle this. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Martin Peres <martin.peres@labri.fr>
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@@ -766,8 +766,10 @@ nouveau_mem_gddr3_mr(struct drm_device *dev, u32 freq,
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t->mr[1] = (boot->mr[1] & 0x100f40) | t->drive_strength |
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t->mr[1] = (boot->mr[1] & 0x100f40) | t->drive_strength |
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(t->odt << 2) |
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(t->odt << 2) |
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(nv_mem_wr_lut_gddr3[e->tWR] & 0xf) << 4;
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(nv_mem_wr_lut_gddr3[e->tWR] & 0xf) << 4;
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t->mr[2] = boot->mr[2];
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NV_DEBUG(dev, "(%u) MR: %08x %08x", t->id, t->mr[0], t->mr[1]);
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NV_DEBUG(dev, "(%u) MR: %08x %08x %08x", t->id,
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t->mr[0], t->mr[1], t->mr[2]);
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return 0;
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return 0;
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}
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}
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@@ -963,6 +965,7 @@ nouveau_mem_exec(struct nouveau_mem_exec_func *exec,
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/* fetch current MRs */
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/* fetch current MRs */
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switch (dev_priv->vram_type) {
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switch (dev_priv->vram_type) {
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case NV_MEM_TYPE_GDDR3:
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case NV_MEM_TYPE_DDR3:
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case NV_MEM_TYPE_DDR3:
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mr[2] = exec->mrg(exec, 2);
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mr[2] = exec->mrg(exec, 2);
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default:
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default:
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