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drm/radeon/kms: fix internal tmds setup on legacy display engine

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- crtc 0 routing was wrong
- need to clear various timing bits in FP_GEN_CNTL
- need to set FP_H/V2_SYNC_STRT_WID regs for crtc 1

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Alex Deucher
2009-10-15 01:33:35 -04:00
committed by Dave Airlie
parent 8c2a6d7304
commit 1b4d7d75cc
2 changed files with 12 additions and 1 deletions
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3
drivers/gpu/drm/radeon/radeon_legacy_crtc.c
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@ -668,6 +668,9 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
WREG32(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl);
WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
WREG32(RADEON_FP_H2_SYNC_STRT_WID, crtc_h_sync_strt_wid);
WREG32(RADEON_FP_V2_SYNC_STRT_WID, crtc_v_sync_strt_wid);
} else {
uint32_t crtc_gen_cntl;
uint32_t crtc_ext_cntl;