sh: Tidy up sh7786 pinmux table.
Formatting and typo fix. Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Kuninori Morimoto
committed by
Paul Mundt
Paul Mundt
parent
f36b59d1a4
commit
1c58b0b1a1
@@ -149,150 +149,44 @@ enum {
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PINMUX_FUNCTION_END,
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PINMUX_MARK_BEGIN,
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CDE_MARK,
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ETH_MAGIC_MARK,
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DISP_MARK,
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ETH_LINK_MARK,
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DR5_MARK,
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ETH_TX_ER_MARK,
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DR4_MARK,
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ETH_TX_EN_MARK,
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DR3_MARK,
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ETH_TXD3_MARK,
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DR2_MARK,
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ETH_TXD2_MARK,
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DR1_MARK,
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ETH_TXD1_MARK,
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DR0_MARK,
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ETH_TXD0_MARK,
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VSYNC_MARK,
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HSPI_CLK_MARK,
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ODDF_MARK,
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HSPI_CS_MARK,
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DG5_MARK,
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ETH_MDIO_MARK,
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DG4_MARK,
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ETH_RX_CLK_MARK,
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DG3_MARK,
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ETH_MDC_MARK,
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DG2_MARK,
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ETH_COL_MARK,
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DG1_MARK,
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ETH_TX_CLK_MARK,
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DG0_MARK,
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ETH_CRS_MARK,
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DCLKIN_MARK,
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HSPI_RX_MARK,
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HSYNC_MARK,
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HSPI_TX_MARK,
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DB5_MARK,
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ETH_RXD3_MARK,
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DB4_MARK,
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ETH_RXD2_MARK,
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DB3_MARK,
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ETH_RXD1_MARK,
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DB2_MARK,
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ETH_RXD0_MARK,
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DB1_MARK,
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ETH_RX_DV_MARK,
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DB0_MARK,
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ETH_RX_ER_MARK,
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DCLKOUT_MARK,
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SCIF1_SLK_MARK,
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SCIF1_RXD_MARK,
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SCIF1_TXD_MARK,
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DACK1_MARK,
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BACK_MARK,
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FALE_MARK,
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DACK0_MARK,
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FCLE_MARK,
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DREQ1_MARK,
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BREQ_MARK,
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USB_OVC1_MARK,
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DREQ0_MARK,
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USB_OVC0_MARK,
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USB_PENC1_MARK,
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USB_PENC0_MARK,
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HAC1_SDOUT_MARK,
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SSI1_SDATA_MARK,
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SDIF1CMD_MARK,
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HAC1_SDIN_MARK,
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SSI1_SCK_MARK,
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SDIF1CD_MARK,
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HAC1_SYNC_MARK,
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SSI1_WS_MARK,
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SDIF1WP_MARK,
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HAC1_BITCLK_MARK,
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SSI1_CLK_MARK,
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SDIF1CLK_MARK,
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HAC0_SDOUT_MARK,
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SSI0_SDATA_MARK,
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SDIF1D3_MARK,
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HAC0_SDIN_MARK,
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SSI0_SCK_MARK,
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SDIF1D2_MARK,
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HAC0_SYNC_MARK,
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SSI0_WS_MARK,
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SDIF1D1_MARK,
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HAC0_BITCLK_MARK,
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SSI0_CLK_MARK,
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SDIF1D0_MARK,
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SCIF3_SCK_MARK,
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SSI2_SDATA_MARK,
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SCIF3_RXD_MARK,
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TCLK_MARK,
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SSI2_SCK_MARK,
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SCIF3_TXD_MARK,
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DCLKIN_MARK, DCLKOUT_MARK, ODDF_MARK,
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VSYNC_MARK, HSYNC_MARK, CDE_MARK, DISP_MARK,
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DR0_MARK, DR1_MARK, DR2_MARK, DR3_MARK, DR4_MARK, DR5_MARK,
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DG0_MARK, DG1_MARK, DG2_MARK, DG3_MARK, DG4_MARK, DG5_MARK,
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DB0_MARK, DB1_MARK, DB2_MARK, DB3_MARK, DB4_MARK, DB5_MARK,
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ETH_MAGIC_MARK, ETH_LINK_MARK, ETH_TX_ER_MARK, ETH_TX_EN_MARK,
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ETH_MDIO_MARK, ETH_RX_CLK_MARK, ETH_MDC_MARK, ETH_COL_MARK,
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ETH_TX_CLK_MARK, ETH_CRS_MARK, ETH_RX_DV_MARK, ETH_RX_ER_MARK,
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ETH_TXD3_MARK, ETH_TXD2_MARK, ETH_TXD1_MARK, ETH_TXD0_MARK,
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ETH_RXD3_MARK, ETH_RXD2_MARK, ETH_RXD1_MARK, ETH_RXD0_MARK,
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HSPI_CLK_MARK, HSPI_CS_MARK, HSPI_RX_MARK, HSPI_TX_MARK,
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SCIF0_CTS_MARK, SCIF0_RTS_MARK,
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SCIF0_SCK_MARK, SCIF0_RXD_MARK, SCIF0_TXD_MARK,
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SCIF1_SCK_MARK, SCIF1_RXD_MARK, SCIF1_TXD_MARK,
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SCIF3_SCK_MARK, SCIF3_RXD_MARK, SCIF3_TXD_MARK,
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SCIF4_SCK_MARK, SCIF4_RXD_MARK, SCIF4_TXD_MARK,
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SCIF5_SCK_MARK, SCIF5_RXD_MARK, SCIF5_TXD_MARK,
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BREQ_MARK, IOIS16_MARK, CE2B_MARK, CE2A_MARK, BACK_MARK,
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FALE_MARK, FRB_MARK, FSTATUS_MARK,
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FSE_MARK, FCLE_MARK,
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DACK0_MARK, DACK1_MARK, DACK2_MARK, DACK3_MARK,
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DREQ0_MARK, DREQ1_MARK, DREQ2_MARK, DREQ3_MARK,
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DRAK0_MARK, DRAK1_MARK, DRAK2_MARK, DRAK3_MARK,
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USB_OVC1_MARK, USB_OVC0_MARK,
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USB_PENC1_MARK, USB_PENC0_MARK,
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HAC_RES_MARK,
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SSI2_WS_MARK,
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DACK3_MARK,
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SDIF0CMD_MARK,
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DACK2_MARK,
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SDIF0CD_MARK,
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DREQ3_MARK,
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SDIF0WP_MARK,
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SCIF0_CTS_MARK,
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DREQ2_MARK,
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SDIF0CLK_MARK,
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SCIF0_RTS_MARK,
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IRL7_MARK,
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SDIF0D3_MARK,
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SCIF0_SCK_MARK,
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IRL6_MARK,
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SDIF0D2_MARK,
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SCIF0_RXD_MARK,
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IRL5_MARK,
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SDIF0D1_MARK,
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SCIF0_TXD_MARK,
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IRL4_MARK,
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SDIF0D0_MARK,
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SCIF5_SCK_MARK,
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FRB_MARK,
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SCIF5_RXD_MARK,
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IOIS16_MARK,
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SCIF5_TXD_MARK,
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CE2B_MARK,
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DRAK3_MARK,
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CE2A_MARK,
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SCIF4_SCK_MARK,
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DRAK2_MARK,
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SSI3_WS_MARK,
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SCIF4_RXD_MARK,
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DRAK1_MARK,
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SSI3_SDATA_MARK,
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FSTATUS_MARK,
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SCIF4_TXD_MARK,
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DRAK0_MARK,
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SSI3_SCK_MARK,
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FSE_MARK,
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HAC1_SDOUT_MARK, HAC1_SDIN_MARK, HAC1_SYNC_MARK, HAC1_BITCLK_MARK,
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HAC0_SDOUT_MARK, HAC0_SDIN_MARK, HAC0_SYNC_MARK, HAC0_BITCLK_MARK,
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SSI0_SDATA_MARK, SSI0_SCK_MARK, SSI0_WS_MARK, SSI0_CLK_MARK,
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SSI1_SDATA_MARK, SSI1_SCK_MARK, SSI1_WS_MARK, SSI1_CLK_MARK,
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SSI2_SDATA_MARK, SSI2_SCK_MARK, SSI2_WS_MARK,
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SSI3_SDATA_MARK, SSI3_SCK_MARK, SSI3_WS_MARK,
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SDIF1CMD_MARK, SDIF1CD_MARK, SDIF1WP_MARK, SDIF1CLK_MARK,
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SDIF1D3_MARK, SDIF1D2_MARK, SDIF1D1_MARK, SDIF1D0_MARK,
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SDIF0CMD_MARK, SDIF0CD_MARK, SDIF0WP_MARK, SDIF0CLK_MARK,
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SDIF0D3_MARK, SDIF0D2_MARK, SDIF0D1_MARK, SDIF0D0_MARK,
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TCLK_MARK,
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IRL7_MARK, IRL6_MARK, IRL5_MARK, IRL4_MARK,
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PINMUX_MARK_END,
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};
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@@ -433,7 +327,7 @@ static pinmux_enum_t pinmux_data[] = {
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/* PD FN */
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PINMUX_DATA(DCLKOUT_MARK, PD7_FN),
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PINMUX_DATA(SCIF1_SLK_MARK, PD6_FN),
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PINMUX_DATA(SCIF1_SCK_MARK, PD6_FN),
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PINMUX_DATA(SCIF1_RXD_MARK, PD5_FN),
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PINMUX_DATA(SCIF1_TXD_MARK, PD4_FN),
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PINMUX_DATA(DACK1_MARK, P1MSEL13_1, P1MSEL12_0, PD3_FN),
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@@ -661,7 +555,7 @@ static struct pinmux_gpio pinmux_gpios[] = {
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PINMUX_GPIO(GPIO_FN_DB0, DB0_MARK),
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PINMUX_GPIO(GPIO_FN_ETH_RX_ER, ETH_RX_ER_MARK),
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PINMUX_GPIO(GPIO_FN_DCLKOUT, DCLKOUT_MARK),
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PINMUX_GPIO(GPIO_FN_SCIF1_SLK, SCIF1_SLK_MARK),
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PINMUX_GPIO(GPIO_FN_SCIF1_SCK, SCIF1_SCK_MARK),
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PINMUX_GPIO(GPIO_FN_SCIF1_RXD, SCIF1_RXD_MARK),
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PINMUX_GPIO(GPIO_FN_SCIF1_TXD, SCIF1_TXD_MARK),
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PINMUX_GPIO(GPIO_FN_DACK1, DACK1_MARK),
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