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usb: dwc3: clean up whitespace damage, typos, missing parens, etc.

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trivial patch, no functional changes

Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Paul Zimmerman
2012-02-15 18:56:56 -08:00
committed by Felipe Balbi
parent 2cd0e85121
commit 1d04679395
5 changed files with 46 additions and 47 deletions
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14
drivers/usb/dwc3/core.c
View File

@@ -167,11 +167,11 @@ static void dwc3_free_one_event_buffer(struct dwc3 *dwc,
} }
/** /**
* dwc3_alloc_one_event_buffer - Allocated one event buffer structure * dwc3_alloc_one_event_buffer - Allocates one event buffer structure
* @dwc: Pointer to our controller context structure * @dwc: Pointer to our controller context structure
* @length: size of the event buffer * @length: size of the event buffer
* *
* Returns a pointer to the allocated event buffer structure on succes * Returns a pointer to the allocated event buffer structure on success
* otherwise ERR_PTR(errno). * otherwise ERR_PTR(errno).
*/ */
static struct dwc3_event_buffer *__devinit static struct dwc3_event_buffer *__devinit
@@ -215,10 +215,10 @@ static void dwc3_free_event_buffers(struct dwc3 *dwc)
/** /**
* dwc3_alloc_event_buffers - Allocates @num event buffers of size @length * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length
* @dwc: Pointer to out controller context structure * @dwc: pointer to our controller context structure
* @length: size of event buffer * @length: size of event buffer
* *
* Returns 0 on success otherwise negative errno. In error the case, dwc * Returns 0 on success otherwise negative errno. In the error case, dwc
* may contain some buffers allocated but not all which were requested. * may contain some buffers allocated but not all which were requested.
*/ */
static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length) static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length)
@@ -251,7 +251,7 @@ static int __devinit dwc3_alloc_event_buffers(struct dwc3 *dwc, unsigned length)
/** /**
* dwc3_event_buffers_setup - setup our allocated event buffers * dwc3_event_buffers_setup - setup our allocated event buffers
* @dwc: Pointer to out controller context structure * @dwc: pointer to our controller context structure
* *
* Returns 0 on success otherwise negative errno. * Returns 0 on success otherwise negative errno.
*/ */
@@ -363,9 +363,9 @@ static int __devinit dwc3_core_init(struct dwc3 *dwc)
/* /*
* WORKAROUND: DWC3 revisions <1.90a have a bug * WORKAROUND: DWC3 revisions <1.90a have a bug
* when The device fails to connect at SuperSpeed * where the device can fail to connect at SuperSpeed
* and falls back to high-speed mode which causes * and falls back to high-speed mode which causes
* the device to enter in a Connect/Disconnect loop * the device to enter a Connect/Disconnect loop
*/ */
if (dwc->revision < DWC3_REVISION_190A) if (dwc->revision < DWC3_REVISION_190A)
reg |= DWC3_GCTL_U2RSTECN; reg |= DWC3_GCTL_U2RSTECN;

22
drivers/usb/dwc3/core.h
View File

@@ -145,22 +145,22 @@
/* Bit fields */ /* Bit fields */
/* Global Configuration Register */ /* Global Configuration Register */
#define DWC3_GCTL_PWRDNSCALE(n) (n << 19) #define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19)
#define DWC3_GCTL_U2RSTECN (1 << 16) #define DWC3_GCTL_U2RSTECN (1 << 16)
#define DWC3_GCTL_RAMCLKSEL(x) ((x & DWC3_GCTL_CLK_MASK) << 6) #define DWC3_GCTL_RAMCLKSEL(x) (((x) & DWC3_GCTL_CLK_MASK) << 6)
#define DWC3_GCTL_CLK_BUS (0) #define DWC3_GCTL_CLK_BUS (0)
#define DWC3_GCTL_CLK_PIPE (1) #define DWC3_GCTL_CLK_PIPE (1)
#define DWC3_GCTL_CLK_PIPEHALF (2) #define DWC3_GCTL_CLK_PIPEHALF (2)
#define DWC3_GCTL_CLK_MASK (3) #define DWC3_GCTL_CLK_MASK (3)
#define DWC3_GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12) #define DWC3_GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12)
#define DWC3_GCTL_PRTCAPDIR(n) (n << 12) #define DWC3_GCTL_PRTCAPDIR(n) ((n) << 12)
#define DWC3_GCTL_PRTCAP_HOST 1 #define DWC3_GCTL_PRTCAP_HOST 1
#define DWC3_GCTL_PRTCAP_DEVICE 2 #define DWC3_GCTL_PRTCAP_DEVICE 2
#define DWC3_GCTL_PRTCAP_OTG 3 #define DWC3_GCTL_PRTCAP_OTG 3
#define DWC3_GCTL_CORESOFTRESET (1 << 11) #define DWC3_GCTL_CORESOFTRESET (1 << 11)
#define DWC3_GCTL_SCALEDOWN(n) (n << 4) #define DWC3_GCTL_SCALEDOWN(n) ((n) << 4)
#define DWC3_GCTL_DISSCRAMBLE (1 << 3) #define DWC3_GCTL_DISSCRAMBLE (1 << 3)
#define DWC3_GCTL_DSBLCLKGTNG (1 << 0) #define DWC3_GCTL_DSBLCLKGTNG (1 << 0)
@@ -177,7 +177,7 @@
#define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000) #define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000)
/* Global HWPARAMS1 Register */ /* Global HWPARAMS1 Register */
#define DWC3_GHWPARAMS1_EN_PWROPT(n) ((n & (3 << 24)) >> 24) #define DWC3_GHWPARAMS1_EN_PWROPT(n) (((n) & (3 << 24)) >> 24)
#define DWC3_GHWPARAMS1_EN_PWROPT_NO 0 #define DWC3_GHWPARAMS1_EN_PWROPT_NO 0
#define DWC3_GHWPARAMS1_EN_PWROPT_CLK 1 #define DWC3_GHWPARAMS1_EN_PWROPT_CLK 1
@@ -273,10 +273,10 @@
/* Device Endpoint Command Register */ /* Device Endpoint Command Register */
#define DWC3_DEPCMD_PARAM_SHIFT 16 #define DWC3_DEPCMD_PARAM_SHIFT 16
#define DWC3_DEPCMD_PARAM(x) (x << DWC3_DEPCMD_PARAM_SHIFT) #define DWC3_DEPCMD_PARAM(x) ((x) << DWC3_DEPCMD_PARAM_SHIFT)
#define DWC3_DEPCMD_GET_RSC_IDX(x) ((x >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f) #define DWC3_DEPCMD_GET_RSC_IDX(x) (((x) >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f)
#define DWC3_DEPCMD_STATUS_MASK (0x0f << 12) #define DWC3_DEPCMD_STATUS_MASK (0x0f << 12)
#define DWC3_DEPCMD_STATUS(x) ((x & DWC3_DEPCMD_STATUS_MASK) >> 12) #define DWC3_DEPCMD_STATUS(x) (((x) & DWC3_DEPCMD_STATUS_MASK) >> 12)
#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11) #define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11)
#define DWC3_DEPCMD_CMDACT (1 << 10) #define DWC3_DEPCMD_CMDACT (1 << 10)
#define DWC3_DEPCMD_CMDIOC (1 << 8) #define DWC3_DEPCMD_CMDIOC (1 << 8)
@@ -683,9 +683,9 @@ struct dwc3_event_depevt {
#define DEPEVT_STATUS_TRANSFER_ACTIVE (1 << 3) #define DEPEVT_STATUS_TRANSFER_ACTIVE (1 << 3)
/* Within XferComplete */ /* Within XferComplete */
#define DEPEVT_STATUS_BUSERR (1 << 0) #define DEPEVT_STATUS_BUSERR (1 << 0)
#define DEPEVT_STATUS_SHORT (1 << 1) #define DEPEVT_STATUS_SHORT (1 << 1)
#define DEPEVT_STATUS_IOC (1 << 2) #define DEPEVT_STATUS_IOC (1 << 2)
#define DEPEVT_STATUS_LST (1 << 3) #define DEPEVT_STATUS_LST (1 << 3)
/* Stream event only */ /* Stream event only */

4
drivers/usb/dwc3/dwc3-pci.c
View File

@@ -69,7 +69,7 @@ static int __devinit dwc3_pci_probe(struct pci_dev *pci,
return -ENOMEM; return -ENOMEM;
} }
glue->dev = dev; glue->dev = dev;
ret = pci_enable_device(pci); ret = pci_enable_device(pci);
if (ret) { if (ret) {
@@ -114,7 +114,7 @@ static int __devinit dwc3_pci_probe(struct pci_dev *pci,
dwc3->dev.dma_mask = dev->dma_mask; dwc3->dev.dma_mask = dev->dma_mask;
dwc3->dev.dma_parms = dev->dma_parms; dwc3->dev.dma_parms = dev->dma_parms;
dwc3->dev.parent = dev; dwc3->dev.parent = dev;
glue->dwc3 = dwc3; glue->dwc3 = dwc3;
ret = platform_device_add(dwc3); ret = platform_device_add(dwc3);
if (ret) { if (ret) {

2
drivers/usb/dwc3/ep0.c
View File

@@ -374,7 +374,7 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
case USB_RECIP_ENDPOINT: case USB_RECIP_ENDPOINT:
switch (wValue) { switch (wValue) {
case USB_ENDPOINT_HALT: case USB_ENDPOINT_HALT:
dep = dwc3_wIndex_to_dep(dwc, wIndex); dep = dwc3_wIndex_to_dep(dwc, wIndex);
if (!dep) if (!dep)
return -EINVAL; return -EINVAL;
ret = __dwc3_gadget_ep_set_halt(dep, set); ret = __dwc3_gadget_ep_set_halt(dep, set);

51
drivers/usb/dwc3/gadget.c
View File

@@ -548,7 +548,7 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep,
memset(&trb_link, 0, sizeof(trb_link)); memset(&trb_link, 0, sizeof(trb_link));
/* Link TRB for ISOC. The HWO but is never reset */ /* Link TRB for ISOC. The HWO bit is never reset */
trb_st_hw = &dep->trb_pool[0]; trb_st_hw = &dep->trb_pool[0];
trb_link = &dep->trb_pool[DWC3_TRB_NUM - 1]; trb_link = &dep->trb_pool[DWC3_TRB_NUM - 1];
@@ -818,9 +818,9 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
* @dep: endpoint for which requests are being prepared * @dep: endpoint for which requests are being prepared
* @starting: true if the endpoint is idle and no requests are queued. * @starting: true if the endpoint is idle and no requests are queued.
* *
* The functions goes through the requests list and setups TRBs for the * The function goes through the requests list and sets up TRBs for the
* transfers. The functions returns once there are not more TRBs available or * transfers. The function returns once there are no more TRBs available or
* it run out of requests. * it runs out of requests.
*/ */
static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting) static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
{ {
@@ -834,8 +834,8 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK; trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK;
/* /*
* if busy & slot are equal than it is either full or empty. If we are * If busy & slot are equal than it is either full or empty. If we are
* starting to proceed requests then we are empty. Otherwise we ar * starting to process requests then we are empty. Otherwise we are
* full and don't do anything * full and don't do anything
*/ */
if (!trbs_left) { if (!trbs_left) {
@@ -846,7 +846,7 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
* In case we start from scratch, we queue the ISOC requests * In case we start from scratch, we queue the ISOC requests
* starting from slot 1. This is done because we use ring * starting from slot 1. This is done because we use ring
* buffer and have no LST bit to stop us. Instead, we place * buffer and have no LST bit to stop us. Instead, we place
* IOC bit TRB_NUM/4. We try to avoid to having an interrupt * IOC bit every TRB_NUM/4. We try to avoid having an interrupt
* after the first request so we start at slot 1 and have * after the first request so we start at slot 1 and have
* 7 requests proceed before we hit the first IOC. * 7 requests proceed before we hit the first IOC.
* Other transfer types don't use the ring buffer and are * Other transfer types don't use the ring buffer and are
@@ -882,8 +882,8 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting)
length = sg_dma_len(s); length = sg_dma_len(s);
dma = sg_dma_address(s); dma = sg_dma_address(s);
if (i == (request->num_mapped_sgs - 1) if (i == (request->num_mapped_sgs - 1) ||
|| sg_is_last(s)) { sg_is_last(s)) {
last_one = true; last_one = true;
chain = false; chain = false;
} }
@@ -951,8 +951,7 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
dwc3_prepare_trbs(dep, start_new); dwc3_prepare_trbs(dep, start_new);
/* /*
* req points to the first request where HWO changed * req points to the first request where HWO changed from 0 to 1
* from 0 to 1
*/ */
req = next_request(&dep->req_queued); req = next_request(&dep->req_queued);
} }
@@ -978,7 +977,7 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param,
/* /*
* FIXME we need to iterate over the list of requests * FIXME we need to iterate over the list of requests
* here and stop, unmap, free and del each of the linked * here and stop, unmap, free and del each of the linked
* requests instead of we do now. * requests instead of what we do now.
*/ */
dwc3_unmap_buffer_from_dma(req); dwc3_unmap_buffer_from_dma(req);
list_del(&req->list); list_del(&req->list);
@@ -1011,7 +1010,7 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
* particular token from the Host side. * particular token from the Host side.
* *
* This will also avoid Host cancelling URBs due to too * This will also avoid Host cancelling URBs due to too
* many NACKs. * many NAKs.
*/ */
dwc3_map_buffer_to_dma(req); dwc3_map_buffer_to_dma(req);
list_add_tail(&req->list, &dep->request_list); list_add_tail(&req->list, &dep->request_list);
@@ -1034,10 +1033,10 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req)
start_trans = 1; start_trans = 1;
if (usb_endpoint_xfer_isoc(dep->desc) && if (usb_endpoint_xfer_isoc(dep->desc) &&
dep->flags & DWC3_EP_BUSY) (dep->flags & DWC3_EP_BUSY))
start_trans = 0; start_trans = 0;
ret = __dwc3_gadget_kick_transfer(dep, 0, start_trans); ret = __dwc3_gadget_kick_transfer(dep, 0, start_trans);
if (ret && ret != -EBUSY) { if (ret && ret != -EBUSY) {
struct dwc3 *dwc = dep->dwc; struct dwc3 *dwc = dep->dwc;
@@ -1291,10 +1290,10 @@ static int dwc3_gadget_wakeup(struct usb_gadget *g)
reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK; reg &= ~DWC3_DCTL_ULSTCHNGREQ_MASK;
dwc3_writel(dwc->regs, DWC3_DCTL, reg); dwc3_writel(dwc->regs, DWC3_DCTL, reg);
/* pool until Link State change to ON */ /* poll until Link State changes to ON */
timeout = jiffies + msecs_to_jiffies(100); timeout = jiffies + msecs_to_jiffies(100);
while (!(time_after(jiffies, timeout))) { while (!time_after(jiffies, timeout)) {
reg = dwc3_readl(dwc->regs, DWC3_DSTS); reg = dwc3_readl(dwc->regs, DWC3_DSTS);
/* in HS, means ON */ /* in HS, means ON */
@@ -1558,10 +1557,10 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep,
if ((trb->ctrl & DWC3_TRB_CTRL_HWO) && status != -ESHUTDOWN) if ((trb->ctrl & DWC3_TRB_CTRL_HWO) && status != -ESHUTDOWN)
/* /*
* We continue despite the error. There is not much we * We continue despite the error. There is not much we
* can do. If we don't clean in up we loop for ever. If * can do. If we don't clean it up we loop forever. If
* we skip the TRB than it gets overwritten reused after * we skip the TRB then it gets overwritten after a
* a while since we use them in a ring buffer. a BUG() * while since we use them in a ring buffer. A BUG()
* would help. Lets hope that if this occures, someone * would help. Lets hope that if this occurs, someone
* fixes the root cause instead of looking away :) * fixes the root cause instead of looking away :)
*/ */
dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n", dev_err(dwc->dev, "%s's TRB (%p) still owned by HW\n",
@@ -1614,7 +1613,7 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc,
if (event->status & DEPEVT_STATUS_BUSERR) if (event->status & DEPEVT_STATUS_BUSERR)
status = -ECONNRESET; status = -ECONNRESET;
clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status); clean_busy = dwc3_cleanup_done_reqs(dwc, dep, event, status);
if (clean_busy) { if (clean_busy) {
dep->flags &= ~DWC3_EP_BUSY; dep->flags &= ~DWC3_EP_BUSY;
dep->res_trans_idx = 0; dep->res_trans_idx = 0;
@@ -1678,8 +1677,8 @@ static void dwc3_process_ep_cmd_complete(struct dwc3_ep *dep,
struct dwc3_event_depevt mod_ev = *event; struct dwc3_event_depevt mod_ev = *event;
/* /*
* We were asked to remove one requests. It is possible that this * We were asked to remove one request. It is possible that this
* request and a few other were started together and have the same * request and a few others were started together and have the same
* transfer index. Since we stopped the complete endpoint we don't * transfer index. Since we stopped the complete endpoint we don't
* know how many requests were already completed (and not yet) * know how many requests were already completed (and not yet)
* reported and how could be done (later). We purge them all until * reported and how could be done (later). We purge them all until
@@ -1688,7 +1687,7 @@ static void dwc3_process_ep_cmd_complete(struct dwc3_ep *dep,
mod_ev.status = DEPEVT_STATUS_LST; mod_ev.status = DEPEVT_STATUS_LST;
dwc3_cleanup_done_reqs(dwc, dep, &mod_ev, -ESHUTDOWN); dwc3_cleanup_done_reqs(dwc, dep, &mod_ev, -ESHUTDOWN);
dep->flags &= ~DWC3_EP_BUSY; dep->flags &= ~DWC3_EP_BUSY;
/* pending requets are ignored and are queued on XferNotReady */ /* pending requests are ignored and are queued on XferNotReady */
} }
static void dwc3_ep_cmd_compl(struct dwc3_ep *dep, static void dwc3_ep_cmd_compl(struct dwc3_ep *dep,
@@ -2285,7 +2284,7 @@ static irqreturn_t dwc3_interrupt(int irq, void *_dwc)
/** /**
* dwc3_gadget_init - Initializes gadget related registers * dwc3_gadget_init - Initializes gadget related registers
* @dwc: Pointer to out controller context structure * @dwc: pointer to our controller context structure
* *
* Returns 0 on success otherwise negative errno. * Returns 0 on success otherwise negative errno.
*/ */