USB: s3c-hsotg: modify only selected bits in S3C_PHYPWR register
S5PV210 SoCs has 2 USB PHY interfaces, both enabled by writing zero to S3C_PHYPWR register. HS/OTG driver uses only PHY0, so do not touch bits related to PHY1. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Greg Kroah-Hartman
parent
4d47166c97
commit
1eb838d3e2
@@ -2801,9 +2801,11 @@ static void __devinit s3c_hsotg_initep(struct s3c_hsotg *hsotg,
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static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)
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static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)
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{
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{
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struct clk *xusbxti;
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struct clk *xusbxti;
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u32 osc;
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u32 pwr, osc;
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writel(0, S3C_PHYPWR);
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pwr = readl(S3C_PHYPWR);
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pwr &= ~0x19;
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writel(pwr, S3C_PHYPWR);
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mdelay(1);
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mdelay(1);
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osc = hsotg->plat->is_osc ? S3C_PHYCLK_EXT_OSC : 0;
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osc = hsotg->plat->is_osc ? S3C_PHYCLK_EXT_OSC : 0;
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