USB: s3c-hsotg: modify only selected bits in S3C_PHYPWR register

S5PV210 SoCs has 2 USB PHY interfaces, both enabled by writing zero to
S3C_PHYPWR register. HS/OTG driver uses only PHY0, so do not touch bits
related to PHY1.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Marek Szyprowski
2010-07-19 16:01:41 +02:00
committed by Greg Kroah-Hartman
parent 4d47166c97
commit 1eb838d3e2

View File

@@ -2801,9 +2801,11 @@ static void __devinit s3c_hsotg_initep(struct s3c_hsotg *hsotg,
static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg) static void s3c_hsotg_otgreset(struct s3c_hsotg *hsotg)
{ {
struct clk *xusbxti; struct clk *xusbxti;
u32 osc; u32 pwr, osc;
writel(0, S3C_PHYPWR); pwr = readl(S3C_PHYPWR);
pwr &= ~0x19;
writel(pwr, S3C_PHYPWR);
mdelay(1); mdelay(1);
osc = hsotg->plat->is_osc ? S3C_PHYCLK_EXT_OSC : 0; osc = hsotg->plat->is_osc ? S3C_PHYCLK_EXT_OSC : 0;