x86: remove smp_apply_quirks()/smp_checks()
Impact: cleanup and code size reduction on 64-bit This code is only applied to Intel Pentium and AMD K7 32-bit cpus. Move those checks to intel_init()/amd_init() for 32-bit so 64-bit will not build this code. Also change to use cpu_index check to see if we need to emit warning. Signed-off-by: Yinghai Lu <yinghai@kernel.org> LKML-Reference: <49B377D2.8030108@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@@ -13,6 +13,7 @@
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#include <asm/uaccess.h>
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#include <asm/ds.h>
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#include <asm/bugs.h>
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#include <asm/cpu.h>
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#ifdef CONFIG_X86_64
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#include <asm/topology.h>
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@@ -110,6 +111,28 @@ static void __cpuinit trap_init_f00f_bug(void)
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}
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#endif
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static void __cpuinit intel_smp_check(struct cpuinfo_x86 *c)
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{
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#ifdef CONFIG_SMP
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/* calling is from identify_secondary_cpu() ? */
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if (c->cpu_index == boot_cpu_id)
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return;
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/*
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* Mask B, Pentium, but not Pentium MMX
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*/
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if (c->x86 == 5 &&
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c->x86_mask >= 1 && c->x86_mask <= 4 &&
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c->x86_model <= 3) {
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/*
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* Remember we have B step Pentia with bugs
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*/
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WARN_ONCE(1, "WARNING: SMP operation may be unreliable"
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"with B stepping processors.\n");
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}
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#endif
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}
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static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
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{
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unsigned long lo, hi;
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@@ -186,6 +209,8 @@ static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
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#ifdef CONFIG_X86_NUMAQ
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numaq_tsc_disable();
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#endif
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intel_smp_check(c);
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}
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#else
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static void __cpuinit intel_workarounds(struct cpuinfo_x86 *c)
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