arch/tile: support backtracing on TILE-Gx
This functionality was stubbed out until recently. Now we support our normal backtracing API on TILE-Gx as well as on TILE64/TILEPro. This change includes a tweak to the instruction encoding caused by adding addxli for compat mode. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
This commit is contained in:
@@ -21,7 +21,9 @@
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#include <arch/chip.h>
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#include <arch/chip.h>
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#if CHIP_VA_WIDTH() > 32
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#if defined(__tile__)
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typedef unsigned long VirtualAddress;
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#elif CHIP_VA_WIDTH() > 32
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typedef unsigned long long VirtualAddress;
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typedef unsigned long long VirtualAddress;
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#else
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#else
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typedef unsigned int VirtualAddress;
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typedef unsigned int VirtualAddress;
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@@ -19,9 +19,6 @@
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#include <arch/chip.h>
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#include <arch/chip.h>
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#if TILE_CHIP < 10
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#include <asm/opcode-tile.h>
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#include <asm/opcode-tile.h>
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@@ -29,6 +26,27 @@
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#define TREG_LR 55
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#define TREG_LR 55
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#if TILE_CHIP >= 10
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#define tile_bundle_bits tilegx_bundle_bits
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#define TILE_MAX_INSTRUCTIONS_PER_BUNDLE TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE
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#define TILE_BUNDLE_ALIGNMENT_IN_BYTES TILEGX_BUNDLE_ALIGNMENT_IN_BYTES
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#define tile_decoded_instruction tilegx_decoded_instruction
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#define tile_mnemonic tilegx_mnemonic
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#define parse_insn_tile parse_insn_tilegx
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#define TILE_OPC_IRET TILEGX_OPC_IRET
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#define TILE_OPC_ADDI TILEGX_OPC_ADDI
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#define TILE_OPC_ADDLI TILEGX_OPC_ADDLI
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#define TILE_OPC_INFO TILEGX_OPC_INFO
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#define TILE_OPC_INFOL TILEGX_OPC_INFOL
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#define TILE_OPC_JRP TILEGX_OPC_JRP
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#define TILE_OPC_MOVE TILEGX_OPC_MOVE
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#define OPCODE_STORE TILEGX_OPC_ST
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typedef long long bt_int_reg_t;
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#else
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#define OPCODE_STORE TILE_OPC_SW
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typedef int bt_int_reg_t;
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#endif
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/** A decoded bundle used for backtracer analysis. */
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/** A decoded bundle used for backtracer analysis. */
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struct BacktraceBundle {
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struct BacktraceBundle {
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tile_bundle_bits bits;
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tile_bundle_bits bits;
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@@ -41,7 +59,7 @@ struct BacktraceBundle {
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/* This implementation only makes sense for native tools. */
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/* This implementation only makes sense for native tools. */
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/** Default function to read memory. */
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/** Default function to read memory. */
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static bool bt_read_memory(void *result, VirtualAddress addr,
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static bool bt_read_memory(void *result, VirtualAddress addr,
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size_t size, void *extra)
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unsigned int size, void *extra)
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{
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{
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/* FIXME: this should do some horrible signal stuff to catch
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/* FIXME: this should do some horrible signal stuff to catch
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* SEGV cleanly and fail.
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* SEGV cleanly and fail.
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@@ -106,6 +124,12 @@ static bool bt_has_addi_sp(const struct BacktraceBundle *bundle, int *adjust)
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find_matching_insn(bundle, TILE_OPC_ADDI, vals, 2);
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find_matching_insn(bundle, TILE_OPC_ADDI, vals, 2);
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if (insn == NULL)
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if (insn == NULL)
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insn = find_matching_insn(bundle, TILE_OPC_ADDLI, vals, 2);
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insn = find_matching_insn(bundle, TILE_OPC_ADDLI, vals, 2);
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#if TILE_CHIP >= 10
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if (insn == NULL)
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insn = find_matching_insn(bundle, TILEGX_OPC_ADDXLI, vals, 2);
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if (insn == NULL)
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insn = find_matching_insn(bundle, TILEGX_OPC_ADDXI, vals, 2);
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#endif
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if (insn == NULL)
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if (insn == NULL)
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return false;
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return false;
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@@ -190,13 +214,52 @@ static inline bool bt_has_move_r52_sp(const struct BacktraceBundle *bundle)
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return find_matching_insn(bundle, TILE_OPC_MOVE, vals, 2) != NULL;
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return find_matching_insn(bundle, TILE_OPC_MOVE, vals, 2) != NULL;
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}
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}
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/** Does this bundle contain the instruction 'sw sp, lr'? */
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/** Does this bundle contain a store of lr to sp? */
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static inline bool bt_has_sw_sp_lr(const struct BacktraceBundle *bundle)
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static inline bool bt_has_sw_sp_lr(const struct BacktraceBundle *bundle)
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{
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{
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static const int vals[2] = { TREG_SP, TREG_LR };
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static const int vals[2] = { TREG_SP, TREG_LR };
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return find_matching_insn(bundle, TILE_OPC_SW, vals, 2) != NULL;
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return find_matching_insn(bundle, OPCODE_STORE, vals, 2) != NULL;
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}
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}
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#if TILE_CHIP >= 10
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/** Track moveli values placed into registers. */
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static inline void bt_update_moveli(const struct BacktraceBundle *bundle,
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int moveli_args[])
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{
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int i;
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for (i = 0; i < bundle->num_insns; i++) {
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const struct tile_decoded_instruction *insn =
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&bundle->insns[i];
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if (insn->opcode->mnemonic == TILEGX_OPC_MOVELI) {
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int reg = insn->operand_values[0];
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moveli_args[reg] = insn->operand_values[1];
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}
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}
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}
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/** Does this bundle contain an 'add sp, sp, reg' instruction
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* from a register that we saw a moveli into, and if so, what
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* is the value in the register?
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*/
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static bool bt_has_add_sp(const struct BacktraceBundle *bundle, int *adjust,
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int moveli_args[])
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{
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static const int vals[2] = { TREG_SP, TREG_SP };
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const struct tile_decoded_instruction *insn =
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find_matching_insn(bundle, TILEGX_OPC_ADDX, vals, 2);
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if (insn) {
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int reg = insn->operand_values[2];
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if (moveli_args[reg]) {
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*adjust = moveli_args[reg];
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return true;
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}
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}
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return false;
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}
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#endif
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/** Locates the caller's PC and SP for a program starting at the
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/** Locates the caller's PC and SP for a program starting at the
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* given address.
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* given address.
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*/
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*/
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@@ -227,6 +290,11 @@ static void find_caller_pc_and_caller_sp(CallerLocation *location,
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int next_bundle = 0;
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int next_bundle = 0;
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VirtualAddress pc;
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VirtualAddress pc;
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#if TILE_CHIP >= 10
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/* Naively try to track moveli values to support addx for -m32. */
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int moveli_args[TILEGX_NUM_REGISTERS] = { 0 };
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#endif
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/* Default to assuming that the caller's sp is the current sp.
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/* Default to assuming that the caller's sp is the current sp.
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* This is necessary to handle the case where we start backtracing
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* This is necessary to handle the case where we start backtracing
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* right at the end of the epilog.
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* right at the end of the epilog.
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@@ -380,7 +448,11 @@ static void find_caller_pc_and_caller_sp(CallerLocation *location,
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if (!sp_determined) {
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if (!sp_determined) {
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int adjust;
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int adjust;
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if (bt_has_addi_sp(&bundle, &adjust)) {
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if (bt_has_addi_sp(&bundle, &adjust)
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#if TILE_CHIP >= 10
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|| bt_has_add_sp(&bundle, &adjust, moveli_args)
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#endif
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) {
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location->sp_location = SP_LOC_OFFSET;
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location->sp_location = SP_LOC_OFFSET;
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if (adjust <= 0) {
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if (adjust <= 0) {
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@@ -427,6 +499,11 @@ static void find_caller_pc_and_caller_sp(CallerLocation *location,
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sp_determined = true;
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sp_determined = true;
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}
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}
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}
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}
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#if TILE_CHIP >= 10
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/* Track moveli arguments for -m32 mode. */
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bt_update_moveli(&bundle, moveli_args);
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#endif
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}
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}
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if (bt_has_iret(&bundle)) {
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if (bt_has_iret(&bundle)) {
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@@ -502,11 +579,10 @@ void backtrace_init(BacktraceIterator *state,
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break;
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break;
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}
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}
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/* The frame pointer should theoretically be aligned mod 8. If
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/* If the frame pointer is not aligned to the basic word size
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* it's not even aligned mod 4 then something terrible happened
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* something terrible happened and we should mark it as invalid.
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* and we should mark it as invalid.
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*/
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*/
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if (fp % 4 != 0)
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if (fp % sizeof(bt_int_reg_t) != 0)
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fp = -1;
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fp = -1;
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/* -1 means "don't know initial_frame_caller_pc". */
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/* -1 means "don't know initial_frame_caller_pc". */
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@@ -547,9 +623,16 @@ void backtrace_init(BacktraceIterator *state,
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state->read_memory_func_extra = read_memory_func_extra;
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state->read_memory_func_extra = read_memory_func_extra;
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}
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}
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/* Handle the case where the register holds more bits than the VA. */
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static bool valid_addr_reg(bt_int_reg_t reg)
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{
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return ((VirtualAddress)reg == reg);
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}
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bool backtrace_next(BacktraceIterator *state)
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bool backtrace_next(BacktraceIterator *state)
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{
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{
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VirtualAddress next_fp, next_pc, next_frame[2];
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VirtualAddress next_fp, next_pc;
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bt_int_reg_t next_frame[2];
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if (state->fp == -1) {
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if (state->fp == -1) {
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/* No parent frame. */
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/* No parent frame. */
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@@ -563,11 +646,9 @@ bool backtrace_next(BacktraceIterator *state)
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}
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}
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next_fp = next_frame[1];
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next_fp = next_frame[1];
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if (next_fp % 4 != 0) {
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if (!valid_addr_reg(next_frame[1]) ||
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/* Caller's frame pointer is suspect, so give up.
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next_fp % sizeof(bt_int_reg_t) != 0) {
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* Technically it should be aligned mod 8, but we will
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/* Caller's frame pointer is suspect, so give up. */
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* be forgiving here.
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*/
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return false;
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return false;
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}
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}
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@@ -585,7 +666,7 @@ bool backtrace_next(BacktraceIterator *state)
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} else {
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} else {
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/* Get the caller PC from the frame linkage area. */
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/* Get the caller PC from the frame linkage area. */
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next_pc = next_frame[0];
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next_pc = next_frame[0];
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if (next_pc == 0 ||
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if (!valid_addr_reg(next_frame[0]) || next_pc == 0 ||
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next_pc % TILE_BUNDLE_ALIGNMENT_IN_BYTES != 0) {
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next_pc % TILE_BUNDLE_ALIGNMENT_IN_BYTES != 0) {
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/* The PC is suspect, so give up. */
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/* The PC is suspect, so give up. */
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return false;
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return false;
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@@ -599,23 +680,3 @@ bool backtrace_next(BacktraceIterator *state)
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return true;
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return true;
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}
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}
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#else /* TILE_CHIP < 10 */
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void backtrace_init(BacktraceIterator *state,
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BacktraceMemoryReader read_memory_func,
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void *read_memory_func_extra,
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VirtualAddress pc, VirtualAddress lr,
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VirtualAddress sp, VirtualAddress r52)
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{
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state->pc = pc;
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state->sp = sp;
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state->fp = -1;
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state->initial_frame_caller_pc = -1;
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state->read_memory_func = read_memory_func;
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state->read_memory_func_extra = read_memory_func_extra;
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}
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bool backtrace_next(BacktraceIterator *state) { return false; }
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#endif /* TILE_CHIP < 10 */
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@@ -108,7 +108,6 @@ static bool read_memory_func(void *result, VirtualAddress address,
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/* Return a pt_regs pointer for a valid fault handler frame */
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/* Return a pt_regs pointer for a valid fault handler frame */
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static struct pt_regs *valid_fault_handler(struct KBacktraceIterator* kbt)
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static struct pt_regs *valid_fault_handler(struct KBacktraceIterator* kbt)
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{
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{
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#ifndef __tilegx__
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const char *fault = NULL; /* happy compiler */
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const char *fault = NULL; /* happy compiler */
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char fault_buf[64];
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char fault_buf[64];
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VirtualAddress sp = kbt->it.sp;
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VirtualAddress sp = kbt->it.sp;
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@@ -146,7 +145,6 @@ static struct pt_regs *valid_fault_handler(struct KBacktraceIterator* kbt)
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}
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}
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if (!kbt->profile || (INT_MASK(p->faultnum) & QUEUED_INTERRUPTS) == 0)
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if (!kbt->profile || (INT_MASK(p->faultnum) & QUEUED_INTERRUPTS) == 0)
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return p;
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return p;
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#endif
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return NULL;
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return NULL;
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}
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}
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@@ -351,12 +349,6 @@ void tile_show_stack(struct KBacktraceIterator *kbt, int headers)
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kbt->task->pid, kbt->task->tgid, kbt->task->comm,
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kbt->task->pid, kbt->task->tgid, kbt->task->comm,
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smp_processor_id(), get_cycles());
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smp_processor_id(), get_cycles());
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}
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}
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#ifdef __tilegx__
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if (kbt->is_current) {
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__insn_mtspr(SPR_SIM_CONTROL,
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SIM_DUMP_SPR_ARG(SIM_DUMP_BACKTRACE));
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}
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#endif
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kbt->verbose = 1;
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kbt->verbose = 1;
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i = 0;
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i = 0;
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for (; !KBacktraceIterator_end(kbt); KBacktraceIterator_next(kbt)) {
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for (; !KBacktraceIterator_end(kbt); KBacktraceIterator_next(kbt)) {
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@@ -128,7 +128,9 @@ static int special_ill(bundle_bits bundle, int *sigp, int *codep)
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#ifdef __tilegx__
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#ifdef __tilegx__
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if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
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if ((bundle & TILEGX_BUNDLE_MODE_MASK) != 0)
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return 0;
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return 0;
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if (get_Opcode_X1(bundle) != UNARY_OPCODE_X1)
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if (get_Opcode_X1(bundle) != RRR_0_OPCODE_X1)
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return 0;
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if (get_RRROpcodeExtension_X1(bundle) != UNARY_RRR_0_OPCODE_X1)
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return 0;
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return 0;
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if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
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if (get_UnaryOpcodeExtension_X1(bundle) != ILL_UNARY_OPCODE_X1)
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return 0;
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return 0;
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