[MIPS] JMR3927 cleanup
* Kill dead codes * Rearrange irq chip handlers * Minimize defconfig Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
committed by
Ralf Baechle
parent
252161eccd
commit
2127435e57
@@ -29,7 +29,6 @@
|
||||
*/
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/jmr3927/jmr3927.h>
|
||||
@@ -81,14 +80,8 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
|
||||
/* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */
|
||||
if (dev->bus->parent == NULL &&
|
||||
slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) {
|
||||
extern int jmr3927_ether1_irq;
|
||||
/* check this irq line was reserved for ether1 */
|
||||
if (jmr3927_ether1_irq != JMR3927_IRQ_ETHER0)
|
||||
irq = JMR3927_IRQ_ETHER0;
|
||||
else
|
||||
irq = 0; /* disable */
|
||||
}
|
||||
slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24))
|
||||
irq = JMR3927_IRQ_ETHER0;
|
||||
return irq;
|
||||
}
|
||||
|
||||
|
@@ -40,7 +40,6 @@
|
||||
|
||||
#include <asm/addrspace.h>
|
||||
#include <asm/jmr3927/jmr3927.h>
|
||||
#include <asm/debug.h>
|
||||
|
||||
static inline int mkaddr(unsigned char bus, unsigned char dev_fn,
|
||||
unsigned char where)
|
||||
@@ -130,234 +129,3 @@ struct pci_ops jmr3927_pci_ops = {
|
||||
jmr3927_pci_read_config,
|
||||
jmr3927_pci_write_config,
|
||||
};
|
||||
|
||||
|
||||
#ifndef JMR3927_INIT_INDIRECT_PCI
|
||||
|
||||
inline unsigned long tc_readl(volatile __u32 * addr)
|
||||
{
|
||||
return readl(addr);
|
||||
}
|
||||
|
||||
inline void tc_writel(unsigned long data, volatile __u32 * addr)
|
||||
{
|
||||
writel(data, addr);
|
||||
}
|
||||
#else
|
||||
|
||||
unsigned long tc_readl(volatile __u32 * addr)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
|
||||
(unsigned long) CPHYSADDR(addr);
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
|
||||
(PCI_IPCIBE_ICMD_MEMREAD << PCI_IPCIBE_ICMD_SHIFT) |
|
||||
PCI_IPCIBE_IBE_LONG;
|
||||
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
|
||||
val =
|
||||
le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
|
||||
ipcidata);
|
||||
/* clear by setting */
|
||||
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
|
||||
return val;
|
||||
}
|
||||
|
||||
void tc_writel(unsigned long data, volatile __u32 * addr)
|
||||
{
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
|
||||
cpu_to_le32(data);
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
|
||||
(unsigned long) CPHYSADDR(addr);
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
|
||||
(PCI_IPCIBE_ICMD_MEMWRITE << PCI_IPCIBE_ICMD_SHIFT) |
|
||||
PCI_IPCIBE_IBE_LONG;
|
||||
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
|
||||
/* clear by setting */
|
||||
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
|
||||
}
|
||||
|
||||
unsigned char tx_ioinb(unsigned char *addr)
|
||||
{
|
||||
unsigned long val;
|
||||
__u32 ioaddr;
|
||||
int offset;
|
||||
int byte;
|
||||
|
||||
ioaddr = (unsigned long) addr;
|
||||
offset = ioaddr & 0x3;
|
||||
byte = 0xf & ~(8 >> offset);
|
||||
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
|
||||
(unsigned long) ioaddr;
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
|
||||
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
|
||||
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
|
||||
val =
|
||||
le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
|
||||
ipcidata);
|
||||
val = val & 0xff;
|
||||
/* clear by setting */
|
||||
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
|
||||
return val;
|
||||
}
|
||||
|
||||
void tx_iooutb(unsigned long data, unsigned char *addr)
|
||||
{
|
||||
__u32 ioaddr;
|
||||
int offset;
|
||||
int byte;
|
||||
|
||||
data = data | (data << 8) | (data << 16) | (data << 24);
|
||||
ioaddr = (unsigned long) addr;
|
||||
offset = ioaddr & 0x3;
|
||||
byte = 0xf & ~(8 >> offset);
|
||||
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
|
||||
(unsigned long) ioaddr;
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
|
||||
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
|
||||
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
|
||||
/* clear by setting */
|
||||
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
|
||||
}
|
||||
|
||||
unsigned short tx_ioinw(unsigned short *addr)
|
||||
{
|
||||
unsigned long val;
|
||||
__u32 ioaddr;
|
||||
int offset;
|
||||
int byte;
|
||||
|
||||
ioaddr = (unsigned long) addr;
|
||||
offset = ioaddr & 0x2;
|
||||
byte = 3 << offset;
|
||||
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
|
||||
(unsigned long) ioaddr;
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
|
||||
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte;
|
||||
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
|
||||
val =
|
||||
le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
|
||||
ipcidata);
|
||||
val = val & 0xffff;
|
||||
/* clear by setting */
|
||||
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
|
||||
return val;
|
||||
|
||||
}
|
||||
|
||||
void tx_iooutw(unsigned long data, unsigned short *addr)
|
||||
{
|
||||
__u32 ioaddr;
|
||||
int offset;
|
||||
int byte;
|
||||
|
||||
data = data | (data << 16);
|
||||
ioaddr = (unsigned long) addr;
|
||||
offset = ioaddr & 0x2;
|
||||
byte = 3 << offset;
|
||||
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data;
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
|
||||
(unsigned long) ioaddr;
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
|
||||
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte;
|
||||
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
|
||||
/* clear by setting */
|
||||
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
|
||||
}
|
||||
|
||||
unsigned long tx_ioinl(unsigned int *addr)
|
||||
{
|
||||
unsigned long val;
|
||||
__u32 ioaddr;
|
||||
|
||||
ioaddr = (unsigned long) addr;
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
|
||||
(unsigned long) ioaddr;
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
|
||||
(PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) |
|
||||
PCI_IPCIBE_IBE_LONG;
|
||||
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
|
||||
val =
|
||||
le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr->
|
||||
ipcidata);
|
||||
/* clear by setting */
|
||||
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
|
||||
return val;
|
||||
}
|
||||
|
||||
void tx_iooutl(unsigned long data, unsigned int *addr)
|
||||
{
|
||||
__u32 ioaddr;
|
||||
|
||||
ioaddr = (unsigned long) addr;
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata =
|
||||
cpu_to_le32(data);
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr =
|
||||
(unsigned long) ioaddr;
|
||||
*(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe =
|
||||
(PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) |
|
||||
PCI_IPCIBE_IBE_LONG;
|
||||
while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC));
|
||||
/* clear by setting */
|
||||
tx3927_pcicptr->istat |= PCI_ISTAT_IDICC;
|
||||
}
|
||||
|
||||
void tx_insbyte(unsigned char *addr, void *buffer, unsigned int count)
|
||||
{
|
||||
unsigned char *ptr = (unsigned char *) buffer;
|
||||
|
||||
while (count--) {
|
||||
*ptr++ = tx_ioinb(addr);
|
||||
}
|
||||
}
|
||||
|
||||
void tx_insword(unsigned short *addr, void *buffer, unsigned int count)
|
||||
{
|
||||
unsigned short *ptr = (unsigned short *) buffer;
|
||||
|
||||
while (count--) {
|
||||
*ptr++ = tx_ioinw(addr);
|
||||
}
|
||||
}
|
||||
|
||||
void tx_inslong(unsigned int *addr, void *buffer, unsigned int count)
|
||||
{
|
||||
unsigned long *ptr = (unsigned long *) buffer;
|
||||
|
||||
while (count--) {
|
||||
*ptr++ = tx_ioinl(addr);
|
||||
}
|
||||
}
|
||||
|
||||
void tx_outsbyte(unsigned char *addr, void *buffer, unsigned int count)
|
||||
{
|
||||
unsigned char *ptr = (unsigned char *) buffer;
|
||||
|
||||
while (count--) {
|
||||
tx_iooutb(*ptr++, addr);
|
||||
}
|
||||
}
|
||||
|
||||
void tx_outsword(unsigned short *addr, void *buffer, unsigned int count)
|
||||
{
|
||||
unsigned short *ptr = (unsigned short *) buffer;
|
||||
|
||||
while (count--) {
|
||||
tx_iooutw(*ptr++, addr);
|
||||
}
|
||||
}
|
||||
|
||||
void tx_outslong(unsigned int *addr, void *buffer, unsigned int count)
|
||||
{
|
||||
unsigned long *ptr = (unsigned long *) buffer;
|
||||
|
||||
while (count--) {
|
||||
tx_iooutl(*ptr++, addr);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
Reference in New Issue
Block a user