x86: merge some trivially mergeable headers
Merge errno.h, resource.h, rtc.h, sections.h, serial.h and sockios.h, where i386 and x86_64 have no or only trivial comment/include guard differences. Build tested on both 32-bit and 64-bit, and booted on 64-bit. [tglx: fixup Kbuild as well] Signed-off-by: Roland Dreier <roland@digitalvampire.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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Thomas Gleixner
parent
020bd9f1c7
commit
217d115cd5
@ -1,5 +1,29 @@
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#ifdef CONFIG_X86_32
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# include "serial_32.h"
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#ifndef _ASM_X86_SERIAL_H
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#define _ASM_X86_SERIAL_H
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/*
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* This assumes you have a 1.8432 MHz clock for your UART.
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*
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* It'd be nice if someone built a serial card with a 24.576 MHz
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* clock, since the 16550A is capable of handling a top speed of 1.5
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* megabits/second; but this requires the faster clock.
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*/
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#define BASE_BAUD ( 1843200 / 16 )
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/* Standard COM flags (except for COM4, because of the 8514 problem) */
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#ifdef CONFIG_SERIAL_DETECT_IRQ
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#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
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#define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
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#else
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# include "serial_64.h"
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#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
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#define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
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#endif
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#define SERIAL_PORT_DFNS \
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/* UART CLK PORT IRQ FLAGS */ \
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{ 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
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{ 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
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{ 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
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{ 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
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#endif /* _ASM_X86_SERIAL_H */
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