lk/linux-kernel-test
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merge branch 'lpc32xx/core2' of git://git.antcom.de/linux-2.6 into next/soc

Browse Source 
From Roland Stigge <stigge@antcom.de>:
this LPC32xx core update (branch lpc32xx/core2) builds upon the
previously provided lpc32xx/core-fixes. Basically including PWM support
(for the PWM driver from Alexandre already in the pwm tree), and
CPU ID.

* 'lpc32xx/core2' of git://git.antcom.de/linux-2.6:
  ARM: LPC32xx: Add PWM support
  ARM: LPC32xx: Add PWM clock
  ARM: LPC32xx: Set system serial based on cpu unique id

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2012-07-21 00:15:59 +02:00
parent 5e7c2c2f97 c49a183086
commit 233de298cb
3 changed files with 23 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/Kconfig
View File

@@ -571,6 +571,7 @@ config ARCH_LPC32XX
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select USE_OF select USE_OF
select HAVE_PWM
help help
Support for the NXP LPC32XX family of processors Support for the NXP LPC32XX family of processors

14
arch/arm/mach-lpc32xx/clock.c
View File

@@ -607,6 +607,19 @@ static struct clk clk_dma = {
.get_rate = local_return_parent_rate, .get_rate = local_return_parent_rate,
}; };
static struct clk clk_pwm = {
.parent = &clk_pclk,
.enable = local_onoff_enable,
.enable_reg = LPC32XX_CLKPWR_PWM_CLK_CTRL,
.enable_mask = LPC32XX_CLKPWR_PWMCLK_PWM1CLK_EN |
LPC32XX_CLKPWR_PWMCLK_PWM1SEL_PCLK |
LPC32XX_CLKPWR_PWMCLK_PWM1_DIV(1) |
LPC32XX_CLKPWR_PWMCLK_PWM2CLK_EN |
LPC32XX_CLKPWR_PWMCLK_PWM2SEL_PCLK |
LPC32XX_CLKPWR_PWMCLK_PWM2_DIV(1),
.get_rate = local_return_parent_rate,
};
static struct clk clk_uart3 = { static struct clk clk_uart3 = {
.parent = &clk_pclk, .parent = &clk_pclk,
.enable = local_onoff_enable, .enable = local_onoff_enable,
@@ -1188,6 +1201,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_INIT(NULL, "vfp9_ck", &clk_vfp9), CLKDEV_INIT(NULL, "vfp9_ck", &clk_vfp9),
CLKDEV_INIT("pl08xdmac", NULL, &clk_dma), CLKDEV_INIT("pl08xdmac", NULL, &clk_dma),
CLKDEV_INIT("4003c000.watchdog", NULL, &clk_wdt), CLKDEV_INIT("4003c000.watchdog", NULL, &clk_wdt),
CLKDEV_INIT("4005c000.pwm", NULL, &clk_pwm),
CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3), CLKDEV_INIT(NULL, "uart3_ck", &clk_uart3),
CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4), CLKDEV_INIT(NULL, "uart4_ck", &clk_uart4),
CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5), CLKDEV_INIT(NULL, "uart5_ck", &clk_uart5),

10
arch/arm/mach-lpc32xx/common.c
View File

@@ -26,6 +26,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include <asm/system_info.h>
#include <mach/hardware.h> #include <mach/hardware.h>
#include <mach/platform.h> #include <mach/platform.h>
@@ -224,7 +225,7 @@ void lpc23xx_restart(char mode, const char *cmd)
; ;
} }
static int __init lpc32xx_display_uid(void) static int __init lpc32xx_check_uid(void)
{ {
u32 uid[4]; u32 uid[4];
@@ -233,6 +234,11 @@ static int __init lpc32xx_display_uid(void)
printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n", printk(KERN_INFO "LPC32XX unique ID: %08x%08x%08x%08x\n",
uid[3], uid[2], uid[1], uid[0]); uid[3], uid[2], uid[1], uid[0]);
if (!system_serial_low && !system_serial_high) {
system_serial_low = uid[0];
system_serial_high = uid[1];
}
return 1; return 1;
} }
arch_initcall(lpc32xx_display_uid); arch_initcall(lpc32xx_check_uid);