[MIPS] Fix loads of section missmatches
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -83,7 +83,7 @@ static void mips_timer_dispatch(void)
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}
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unsigned __init get_c0_compare_int(void)
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unsigned __cpuinit get_c0_compare_int(void)
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{
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#ifdef MSC01E_INT_BASE
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if (cpu_has_veic) {
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