drm/i915/debug: Convert i915_verify_active() to scan all lists
... and check more regularly. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
@@ -30,24 +30,107 @@
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#include "i915_drm.h"
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#include "i915_drv.h"
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#if WATCH_INACTIVE
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void
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i915_verify_inactive(struct drm_device *dev, char *file, int line)
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#if WATCH_LISTS
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int
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i915_verify_lists(struct drm_device *dev)
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{
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static int warned;
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drm_i915_private_t *dev_priv = dev->dev_private;
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struct drm_gem_object *obj;
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struct drm_i915_gem_object *obj_priv;
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struct drm_i915_gem_object *obj;
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int err = 0;
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list_for_each_entry(obj_priv, &dev_priv->mm.inactive_list, list) {
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obj = &obj_priv->base;
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if (obj_priv->pin_count || obj_priv->active ||
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(obj->write_domain & ~(I915_GEM_DOMAIN_CPU |
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I915_GEM_DOMAIN_GTT)))
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DRM_ERROR("inactive %p (p %d a %d w %x) %s:%d\n",
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if (warned)
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return 0;
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list_for_each_entry(obj, &dev_priv->render_ring.active_list, list) {
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if (obj->base.dev != dev ||
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!atomic_read(&obj->base.refcount.refcount)) {
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DRM_ERROR("freed render active %p\n", obj);
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err++;
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break;
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} else if (!obj->active ||
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(obj->base.read_domains & I915_GEM_GPU_DOMAINS) == 0) {
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DRM_ERROR("invalid render active %p (a %d r %x)\n",
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obj,
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obj_priv->pin_count, obj_priv->active,
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obj->write_domain, file, line);
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obj->active,
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obj->base.read_domains);
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err++;
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} else if (obj->base.write_domain && list_empty(&obj->gpu_write_list)) {
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DRM_ERROR("invalid render active %p (w %x, gwl %d)\n",
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obj,
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obj->base.write_domain,
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!list_empty(&obj->gpu_write_list));
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err++;
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}
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}
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list_for_each_entry(obj, &dev_priv->mm.flushing_list, list) {
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if (obj->base.dev != dev ||
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!atomic_read(&obj->base.refcount.refcount)) {
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DRM_ERROR("freed flushing %p\n", obj);
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err++;
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break;
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} else if (!obj->active ||
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(obj->base.write_domain & I915_GEM_GPU_DOMAINS) == 0 ||
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list_empty(&obj->gpu_write_list)){
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DRM_ERROR("invalid flushing %p (a %d w %x gwl %d)\n",
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obj,
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obj->active,
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obj->base.write_domain,
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!list_empty(&obj->gpu_write_list));
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err++;
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}
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}
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list_for_each_entry(obj, &dev_priv->mm.gpu_write_list, gpu_write_list) {
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if (obj->base.dev != dev ||
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!atomic_read(&obj->base.refcount.refcount)) {
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DRM_ERROR("freed gpu write %p\n", obj);
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err++;
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break;
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} else if (!obj->active ||
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(obj->base.write_domain & I915_GEM_GPU_DOMAINS) == 0) {
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DRM_ERROR("invalid gpu write %p (a %d w %x)\n",
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obj,
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obj->active,
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obj->base.write_domain);
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err++;
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}
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}
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list_for_each_entry(obj, &dev_priv->mm.inactive_list, list) {
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if (obj->base.dev != dev ||
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!atomic_read(&obj->base.refcount.refcount)) {
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DRM_ERROR("freed inactive %p\n", obj);
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err++;
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break;
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} else if (obj->pin_count || obj->active ||
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(obj->base.write_domain & I915_GEM_GPU_DOMAINS)) {
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DRM_ERROR("invalid inactive %p (p %d a %d w %x)\n",
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obj,
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obj->pin_count, obj->active,
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obj->base.write_domain);
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err++;
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}
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}
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list_for_each_entry(obj, &dev_priv->mm.pinned_list, list) {
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if (obj->base.dev != dev ||
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!atomic_read(&obj->base.refcount.refcount)) {
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DRM_ERROR("freed pinned %p\n", obj);
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err++;
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break;
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} else if (!obj->pin_count || obj->active ||
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(obj->base.write_domain & I915_GEM_GPU_DOMAINS)) {
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DRM_ERROR("invalid pinned %p (p %d a %d w %x)\n",
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obj,
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obj->pin_count, obj->active,
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obj->base.write_domain);
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err++;
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}
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}
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return warned = err;
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}
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#endif /* WATCH_INACTIVE */
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