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sh: Handle unaligned 16-bit instructions on SH-2A.

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This adds some sanity checking in the unaligned instruction handler to
verify the instruction size, which enables basic support for 16-bit
fixups on SH-2A parts.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt
2009-09-24 17:38:18 +09:00
parent acf3cc283f
commit 23c4c82171
1 changed files with 8 additions and 3 deletions
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11
arch/sh/kernel/traps_32.c
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@@ -452,6 +452,12 @@ int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
u_int rm; u_int rm;
int ret, index; int ret, index;
/*
* XXX: We can't handle mixed 16/32-bit instructions yet
*/
if (instruction_size(instruction) != 2)
return -EINVAL;
index = (instruction>>8)&15; /* 0x0F00 */ index = (instruction>>8)&15; /* 0x0F00 */
rm = regs->regs[index]; rm = regs->regs[index];
@@ -619,9 +625,9 @@ asmlinkage void do_address_error(struct pt_regs *regs,
se_user += 1; se_user += 1;
#ifndef CONFIG_CPU_SH2A
set_fs(USER_DS); set_fs(USER_DS);
if (copy_from_user(&instruction, (u16 *)(regs->pc & ~1), 2)) { if (copy_from_user(&instruction, (insn_size_t *)(regs->pc & ~1),
sizeof(instruction))) {
set_fs(oldfs); set_fs(oldfs);
goto uspace_segv; goto uspace_segv;
} }
@@ -633,7 +639,6 @@ asmlinkage void do_address_error(struct pt_regs *regs,
"in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n", "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
current->comm, current->pid, (void *)regs->pc, current->comm, current->pid, (void *)regs->pc,
instruction); instruction);
#endif
if (se_usermode & 2) if (se_usermode & 2)
goto fixup; goto fixup;