Merge branch 'timers/urgent' into timers/core
Reason: Get upstream fixes and kfree_rcu which is necessary for a follow up patch. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
@ -194,6 +194,70 @@ void clockevents_register_device(struct clock_event_device *dev)
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}
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EXPORT_SYMBOL_GPL(clockevents_register_device);
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static void clockevents_config(struct clock_event_device *dev,
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u32 freq)
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{
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u64 sec;
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if (!(dev->features & CLOCK_EVT_FEAT_ONESHOT))
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return;
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/*
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* Calculate the maximum number of seconds we can sleep. Limit
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* to 10 minutes for hardware which can program more than
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* 32bit ticks so we still get reasonable conversion values.
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*/
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sec = dev->max_delta_ticks;
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do_div(sec, freq);
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if (!sec)
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sec = 1;
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else if (sec > 600 && dev->max_delta_ticks > UINT_MAX)
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sec = 600;
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clockevents_calc_mult_shift(dev, freq, sec);
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dev->min_delta_ns = clockevent_delta2ns(dev->min_delta_ticks, dev);
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dev->max_delta_ns = clockevent_delta2ns(dev->max_delta_ticks, dev);
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}
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/**
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* clockevents_config_and_register - Configure and register a clock event device
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* @dev: device to register
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* @freq: The clock frequency
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* @min_delta: The minimum clock ticks to program in oneshot mode
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* @max_delta: The maximum clock ticks to program in oneshot mode
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*
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* min/max_delta can be 0 for devices which do not support oneshot mode.
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*/
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void clockevents_config_and_register(struct clock_event_device *dev,
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u32 freq, unsigned long min_delta,
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unsigned long max_delta)
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{
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dev->min_delta_ticks = min_delta;
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dev->max_delta_ticks = max_delta;
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clockevents_config(dev, freq);
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clockevents_register_device(dev);
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}
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/**
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* clockevents_update_freq - Update frequency and reprogram a clock event device.
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* @dev: device to modify
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* @freq: new device frequency
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*
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* Reconfigure and reprogram a clock event device in oneshot
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* mode. Must be called on the cpu for which the device delivers per
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* cpu timer events with interrupts disabled! Returns 0 on success,
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* -ETIME when the event is in the past.
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*/
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int clockevents_update_freq(struct clock_event_device *dev, u32 freq)
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{
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clockevents_config(dev, freq);
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if (dev->mode != CLOCK_EVT_MODE_ONESHOT)
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return 0;
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return clockevents_program_event(dev, dev->next_event, ktime_get());
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}
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/*
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* Noop handler when we shut down an event device
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*/
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@ -626,19 +626,6 @@ static void clocksource_enqueue(struct clocksource *cs)
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list_add(&cs->list, entry);
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}
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/*
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* Maximum time we expect to go between ticks. This includes idle
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* tickless time. It provides the trade off between selecting a
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* mult/shift pair that is very precise but can only handle a short
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* period of time, vs. a mult/shift pair that can handle long periods
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* of time but isn't as precise.
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*
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* This is a subsystem constant, and actual hardware limitations
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* may override it (ie: clocksources that wrap every 3 seconds).
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*/
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#define MAX_UPDATE_LENGTH 5 /* Seconds */
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/**
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* __clocksource_updatefreq_scale - Used update clocksource with new freq
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* @t: clocksource to be registered
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@ -652,15 +639,28 @@ static void clocksource_enqueue(struct clocksource *cs)
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*/
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void __clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq)
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{
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u64 sec;
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/*
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* Ideally we want to use some of the limits used in
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* clocksource_max_deferment, to provide a more informed
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* MAX_UPDATE_LENGTH. But for now this just gets the
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* register interface working properly.
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* Calc the maximum number of seconds which we can run before
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* wrapping around. For clocksources which have a mask > 32bit
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* we need to limit the max sleep time to have a good
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* conversion precision. 10 minutes is still a reasonable
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* amount. That results in a shift value of 24 for a
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* clocksource with mask >= 40bit and f >= 4GHz. That maps to
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* ~ 0.06ppm granularity for NTP. We apply the same 12.5%
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* margin as we do in clocksource_max_deferment()
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*/
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sec = (cs->mask - (cs->mask >> 5));
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do_div(sec, freq);
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do_div(sec, scale);
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if (!sec)
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sec = 1;
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else if (sec > 600 && cs->mask > UINT_MAX)
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sec = 600;
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clocks_calc_mult_shift(&cs->mult, &cs->shift, freq,
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NSEC_PER_SEC/scale,
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MAX_UPDATE_LENGTH*scale);
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NSEC_PER_SEC / scale, sec * scale);
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cs->max_idle_ns = clocksource_max_deferment(cs);
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}
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EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale);
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@ -685,8 +685,8 @@ int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq)
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/* Add clocksource to the clcoksource list */
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mutex_lock(&clocksource_mutex);
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clocksource_enqueue(cs);
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clocksource_select();
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clocksource_enqueue_watchdog(cs);
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clocksource_select();
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mutex_unlock(&clocksource_mutex);
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return 0;
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}
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@ -706,8 +706,8 @@ int clocksource_register(struct clocksource *cs)
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mutex_lock(&clocksource_mutex);
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clocksource_enqueue(cs);
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clocksource_select();
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clocksource_enqueue_watchdog(cs);
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clocksource_select();
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mutex_unlock(&clocksource_mutex);
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return 0;
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}
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@ -524,10 +524,11 @@ static void tick_broadcast_init_next_event(struct cpumask *mask,
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*/
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void tick_broadcast_setup_oneshot(struct clock_event_device *bc)
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{
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int cpu = smp_processor_id();
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/* Set it up only once ! */
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if (bc->event_handler != tick_handle_oneshot_broadcast) {
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int was_periodic = bc->mode == CLOCK_EVT_MODE_PERIODIC;
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int cpu = smp_processor_id();
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bc->event_handler = tick_handle_oneshot_broadcast;
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clockevents_set_mode(bc, CLOCK_EVT_MODE_ONESHOT);
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@ -553,6 +554,15 @@ void tick_broadcast_setup_oneshot(struct clock_event_device *bc)
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tick_broadcast_set_event(tick_next_period, 1);
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} else
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bc->next_event.tv64 = KTIME_MAX;
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} else {
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/*
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* The first cpu which switches to oneshot mode sets
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* the bit for all other cpus which are in the general
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* (periodic) broadcast mask. So the bit is set and
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* would prevent the first broadcast enter after this
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* to program the bc device.
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*/
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tick_broadcast_clear_oneshot(cpu);
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}
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}
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