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ixgbe: Fill out PCIe speed and width enums with values

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This patch fills in the values for bus speed and width of the
ixgbe_bus_speed and ixgbe_bus_width enums.

Signed-off-by: Emil Tantilov <emil.s.tantilov@intel.com>
Tested-by: Stephen Ko <stephen.s.ko@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Emil Tantilov
2011-02-17 11:34:53 +00:00
committed by Jeff Kirsher
parent 1783575c1a
commit 26d6899ba7
1 changed files with 11 additions and 11 deletions
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22
drivers/net/ixgbe/ixgbe_type.h
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@@ -2333,25 +2333,25 @@ enum ixgbe_bus_type {
/* PCI bus speeds */ /* PCI bus speeds */
enum ixgbe_bus_speed { enum ixgbe_bus_speed {
ixgbe_bus_speed_unknown = 0, ixgbe_bus_speed_unknown = 0,
ixgbe_bus_speed_33, ixgbe_bus_speed_33 = 33,
ixgbe_bus_speed_66, ixgbe_bus_speed_66 = 66,
ixgbe_bus_speed_100, ixgbe_bus_speed_100 = 100,
ixgbe_bus_speed_120, ixgbe_bus_speed_120 = 120,
ixgbe_bus_speed_133, ixgbe_bus_speed_133 = 133,
ixgbe_bus_speed_2500, ixgbe_bus_speed_2500 = 2500,
ixgbe_bus_speed_5000, ixgbe_bus_speed_5000 = 5000,
ixgbe_bus_speed_reserved ixgbe_bus_speed_reserved
}; };
/* PCI bus widths */ /* PCI bus widths */
enum ixgbe_bus_width { enum ixgbe_bus_width {
ixgbe_bus_width_unknown = 0, ixgbe_bus_width_unknown = 0,
ixgbe_bus_width_pcie_x1, ixgbe_bus_width_pcie_x1 = 1,
ixgbe_bus_width_pcie_x2, ixgbe_bus_width_pcie_x2 = 2,
ixgbe_bus_width_pcie_x4 = 4, ixgbe_bus_width_pcie_x4 = 4,
ixgbe_bus_width_pcie_x8 = 8, ixgbe_bus_width_pcie_x8 = 8,
ixgbe_bus_width_32, ixgbe_bus_width_32 = 32,
ixgbe_bus_width_64, ixgbe_bus_width_64 = 64,
ixgbe_bus_width_reserved ixgbe_bus_width_reserved
}; };