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[PPC] Use cpu setup routines from cpu_setup_44x.S for ARCH=ppc

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Commit 8112753bb2 made 44x in
ARCH=powerpc builds use cpu setup routines in cpu_setup_44x.S,
but didn't make a similar change for ARCH=ppc, and consequently
the ARCH=ppc builds fail with undefined symbols (since both use
the same cputable.c).

This fixes it by including cpu_setup_44x.S in the ARCH=ppc builds,
and by taking out the now-redundant FPU initialization in
arch/ppc/kernel/head_44x.S.

Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Paul Mackerras
2007-10-04 11:02:09 +10:00
parent e077b50c29
commit 26f571d7c9
2 changed files with 1 additions and 11 deletions
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2
arch/powerpc/kernel/Makefile
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@@ -42,6 +42,7 @@ obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \
swsusp_$(CONFIG_WORD_SIZE).o swsusp_$(CONFIG_WORD_SIZE).o
obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o
obj-$(CONFIG_MODULES) += module_$(CONFIG_WORD_SIZE).o obj-$(CONFIG_MODULES) += module_$(CONFIG_WORD_SIZE).o
obj-$(CONFIG_44x) += cpu_setup_44x.o
ifeq ($(CONFIG_PPC_MERGE),y) ifeq ($(CONFIG_PPC_MERGE),y)
@@ -58,7 +59,6 @@ obj-y += time.o prom.o traps.o setup-common.o \
misc_$(CONFIG_WORD_SIZE).o misc_$(CONFIG_WORD_SIZE).o
obj-$(CONFIG_PPC32) += entry_32.o setup_32.o obj-$(CONFIG_PPC32) += entry_32.o setup_32.o
obj-$(CONFIG_PPC64) += dma_64.o iommu.o obj-$(CONFIG_PPC64) += dma_64.o iommu.o
obj-$(CONFIG_44x) += cpu_setup_44x.o
obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o obj-$(CONFIG_PPC_MULTIPLATFORM) += prom_init.o
obj-$(CONFIG_MODULES) += ppc_ksyms.o obj-$(CONFIG_MODULES) += ppc_ksyms.o
obj-$(CONFIG_BOOTX_TEXT) += btext.o obj-$(CONFIG_BOOTX_TEXT) += btext.o

10
arch/ppc/kernel/head_44x.S
View File

@@ -227,16 +227,6 @@ skpinv: addi r4,r4,1 /* Increment */
lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
mtspr SPRN_IVPR,r4 mtspr SPRN_IVPR,r4
#ifdef CONFIG_440EP
/* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */
mfspr r2,SPRN_CCR0
lis r3,0xffef
ori r3,r3,0xffff
and r2,r2,r3
mtspr SPRN_CCR0,r2
isync
#endif
/* /*
* This is where the main kernel code starts. * This is where the main kernel code starts.
*/ */