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x86/pci: Enable pci root res read out for 32bit too

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Should be good for 32bit too.

-v3: cast res->start
-v4: according to Linus, to use %pR instead of cast

Signed-off-by: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <1265793639-15071-9-git-send-email-yinghai@kernel.org>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
Yinghai Lu
2010-02-10 01:20:12 -08:00
committed by H. Peter Anvin
parent 9ad3f2c7c6
commit 284f933d45
4 changed files with 5 additions and 24 deletions
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3
arch/x86/pci/Makefile
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@@ -14,8 +14,7 @@ obj-$(CONFIG_X86_VISWS) += visws.o
obj-$(CONFIG_X86_NUMAQ) += numaq_32.o obj-$(CONFIG_X86_NUMAQ) += numaq_32.o
obj-y += common.o early.o obj-y += common.o early.o
obj-y += amd_bus.o obj-y += amd_bus.o bus_numa.o
obj-$(CONFIG_X86_64) += bus_numa.o
ifeq ($(CONFIG_PCI_DEBUG),y) ifeq ($(CONFIG_PCI_DEBUG),y)
EXTRA_CFLAGS += -DDEBUG EXTRA_CFLAGS += -DDEBUG

18
arch/x86/pci/amd_bus.c
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@@ -6,9 +6,7 @@
#include <asm/pci_x86.h> #include <asm/pci_x86.h>
#ifdef CONFIG_X86_64
#include <asm/pci-direct.h> #include <asm/pci-direct.h>
#endif
#include "bus_numa.h" #include "bus_numa.h"
@@ -17,8 +15,6 @@
* also get peer root bus resource for io,mmio * also get peer root bus resource for io,mmio
*/ */
#ifdef CONFIG_X86_64
struct pci_hostbridge_probe { struct pci_hostbridge_probe {
u32 bus; u32 bus;
u32 slot; u32 slot;
@@ -339,24 +335,14 @@ static int __init early_fill_mp_bus_info(void)
info->bus_min, info->bus_max, info->node, info->link); info->bus_min, info->bus_max, info->node, info->link);
for (j = 0; j < res_num; j++) { for (j = 0; j < res_num; j++) {
res = &info->res[j]; res = &info->res[j];
printk(KERN_DEBUG "bus: %02x index %x %s: [%llx, %llx]\n", printk(KERN_DEBUG "bus: %02x index %x %pR\n",
busnum, j, busnum, j, res);
(res->flags & IORESOURCE_IO)?"io port":"mmio",
res->start, res->end);
} }
} }
return 0; return 0;
} }
#else /* !CONFIG_X86_64 */
static int __init early_fill_mp_bus_info(void) { return 0; }
#endif /* !CONFIG_X86_64 */
/* common 32/64 bit code */
#define ENABLE_CF8_EXT_CFG (1ULL << 46) #define ENABLE_CF8_EXT_CFG (1ULL << 46)
static void enable_pci_io_ecs(void *unused) static void enable_pci_io_ecs(void *unused)

4
arch/x86/pci/bus_numa.h
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@@ -1,5 +1,5 @@
#ifdef CONFIG_X86_64 #ifndef __BUS_NUMA_H
#define __BUS_NUMA_H
/* /*
* sub bus (transparent) will use entres from 3 to store extra from * sub bus (transparent) will use entres from 3 to store extra from
* root, so need to make sure we have enough slot there, Should we * root, so need to make sure we have enough slot there, Should we

4
arch/x86/pci/i386.c
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@@ -257,10 +257,6 @@ void __init pcibios_resource_survey(void)
*/ */
fs_initcall(pcibios_assign_resources); fs_initcall(pcibios_assign_resources);
void __weak x86_pci_root_bus_res_quirks(struct pci_bus *b)
{
}
/* /*
* If we set up a device for bus mastering, we need to check the latency * If we set up a device for bus mastering, we need to check the latency
* timer as certain crappy BIOSes forget to set it properly. * timer as certain crappy BIOSes forget to set it properly.