ath9k: Cleanup init/deinit routines
The device initialization and termination functions were messy and convoluted. Introduce helper functions to clarify init_softc() and simplify things in general. Signed-off-by: Sujith <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
@@ -121,16 +121,16 @@ static int ath_ahb_probe(struct platform_device *pdev)
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sc->mem = mem;
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sc->mem = mem;
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sc->irq = irq;
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sc->irq = irq;
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ret = ath_init_device(AR5416_AR9100_DEVID, sc, 0x0, &ath_ahb_bus_ops);
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if (ret) {
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dev_err(&pdev->dev, "failed to initialize device\n");
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goto err_free_hw;
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}
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ret = request_irq(irq, ath_isr, IRQF_SHARED, "ath9k", sc);
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ret = request_irq(irq, ath_isr, IRQF_SHARED, "ath9k", sc);
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if (ret) {
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if (ret) {
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dev_err(&pdev->dev, "request_irq failed\n");
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dev_err(&pdev->dev, "request_irq failed\n");
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goto err_detach;
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goto err_free_hw;
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}
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ret = ath9k_init_device(AR5416_AR9100_DEVID, sc, 0x0, &ath_ahb_bus_ops);
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if (ret) {
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dev_err(&pdev->dev, "failed to initialize device\n");
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goto err_irq;
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}
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}
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ah = sc->sc_ah;
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ah = sc->sc_ah;
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@@ -143,8 +143,8 @@ static int ath_ahb_probe(struct platform_device *pdev)
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return 0;
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return 0;
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err_detach:
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err_irq:
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ath_detach(sc);
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free_irq(irq, sc);
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err_free_hw:
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err_free_hw:
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ieee80211_free_hw(hw);
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ieee80211_free_hw(hw);
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platform_set_drvdata(pdev, NULL);
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platform_set_drvdata(pdev, NULL);
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@@ -161,8 +161,12 @@ static int ath_ahb_remove(struct platform_device *pdev)
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if (hw) {
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if (hw) {
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struct ath_wiphy *aphy = hw->priv;
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struct ath_wiphy *aphy = hw->priv;
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struct ath_softc *sc = aphy->sc;
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struct ath_softc *sc = aphy->sc;
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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ath_cleanup(sc);
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ath9k_deinit_device(sc);
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free_irq(sc->irq, sc);
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ieee80211_free_hw(sc->hw);
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ath_bus_cleanup(common);
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platform_set_drvdata(pdev, NULL);
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platform_set_drvdata(pdev, NULL);
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}
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}
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@@ -544,13 +544,12 @@ extern struct ieee80211_ops ath9k_ops;
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extern int modparam_nohwcrypt;
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extern int modparam_nohwcrypt;
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irqreturn_t ath_isr(int irq, void *dev);
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irqreturn_t ath_isr(int irq, void *dev);
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void ath_cleanup(struct ath_softc *sc);
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int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
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int ath_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
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const struct ath_bus_ops *bus_ops);
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const struct ath_bus_ops *bus_ops);
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void ath_detach(struct ath_softc *sc);
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void ath9k_deinit_device(struct ath_softc *sc);
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const char *ath_mac_bb_name(u32 mac_bb_version);
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const char *ath_mac_bb_name(u32 mac_bb_version);
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const char *ath_rf_name(u16 rf_version);
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const char *ath_rf_name(u16 rf_version);
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void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
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void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
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void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
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void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
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struct ath9k_channel *ichan);
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struct ath9k_channel *ichan);
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void ath_update_chainmask(struct ath_softc *sc, int is_ht);
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void ath_update_chainmask(struct ath_softc *sc, int is_ht);
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@@ -1242,7 +1242,7 @@ static void ath9k_hw_init_user_settings(struct ath_hw *ah)
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ath9k_hw_set_global_txtimeout(ah, ah->globaltxtimeout);
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ath9k_hw_set_global_txtimeout(ah, ah->globaltxtimeout);
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}
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}
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void ath9k_hw_detach(struct ath_hw *ah)
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void ath9k_hw_deinit(struct ath_hw *ah)
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{
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{
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_common *common = ath9k_hw_common(ah);
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@@ -1260,7 +1260,7 @@ free_hw:
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kfree(ah);
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kfree(ah);
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ah = NULL;
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ah = NULL;
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}
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}
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EXPORT_SYMBOL(ath9k_hw_detach);
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EXPORT_SYMBOL(ath9k_hw_deinit);
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/*******/
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/*******/
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/* INI */
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/* INI */
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@@ -616,7 +616,7 @@ static inline struct ath_regulatory *ath9k_hw_regulatory(struct ath_hw *ah)
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/* Initialization, Detach, Reset */
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/* Initialization, Detach, Reset */
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const char *ath9k_hw_probe(u16 vendorid, u16 devid);
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const char *ath9k_hw_probe(u16 vendorid, u16 devid);
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void ath9k_hw_detach(struct ath_hw *ah);
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void ath9k_hw_deinit(struct ath_hw *ah);
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int ath9k_hw_init(struct ath_hw *ah);
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int ath9k_hw_init(struct ath_hw *ah);
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int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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bool bChannelChange);
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bool bChannelChange);
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@@ -128,7 +128,7 @@ static struct ieee80211_rate ath9k_legacy_rates[] = {
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RATE(540, 0x0c, 0),
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RATE(540, 0x0c, 0),
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};
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};
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static void ath9k_uninit_hw(struct ath_softc *sc);
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static void ath9k_deinit_softc(struct ath_softc *sc);
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/*
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/*
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* Read and write, they both share the same lock. We do this to serialize
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* Read and write, they both share the same lock. We do this to serialize
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@@ -333,67 +333,13 @@ fail:
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#undef DS2PHYS
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#undef DS2PHYS
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}
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}
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static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
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static void ath9k_init_crypto(struct ath_softc *sc)
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const struct ath_bus_ops *bus_ops)
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{
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{
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struct ath_hw *ah = NULL;
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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struct ath_common *common;
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int i = 0;
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int r = 0, i;
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int csz = 0;
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int qnum;
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/* XXX: hardware will not be ready until ath_open() being called */
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sc->sc_flags |= SC_OP_INVALID;
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spin_lock_init(&sc->wiphy_lock);
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spin_lock_init(&sc->sc_resetlock);
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spin_lock_init(&sc->sc_serial_rw);
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spin_lock_init(&sc->sc_pm_lock);
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mutex_init(&sc->mutex);
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tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
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tasklet_init(&sc->bcon_tasklet, ath_beacon_tasklet,
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(unsigned long)sc);
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ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
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if (!ah)
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return -ENOMEM;
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ah->hw_version.devid = devid;
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ah->hw_version.subsysid = subsysid;
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sc->sc_ah = ah;
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common = ath9k_hw_common(ah);
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common->ops = &ath9k_common_ops;
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common->bus_ops = bus_ops;
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common->ah = ah;
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common->hw = sc->hw;
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common->priv = sc;
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common->debug_mask = ath9k_debug;
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/*
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* Cache line size is used to size and align various
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* structures used to communicate with the hardware.
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*/
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ath_read_cachesize(common, &csz);
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/* XXX assert csz is non-zero */
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common->cachelsz = csz << 2; /* convert to bytes */
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r = ath9k_hw_init(ah);
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if (r) {
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ath_print(common, ATH_DBG_FATAL,
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"Unable to initialize hardware; "
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"initialization status: %d\n", r);
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goto bad_free_hw;
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}
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if (ath9k_init_debug(ah) < 0) {
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ath_print(common, ATH_DBG_FATAL,
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"Unable to create debugfs files\n");
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goto bad_free_hw;
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}
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/* Get the hardware key cache size. */
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/* Get the hardware key cache size. */
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common->keymax = ah->caps.keycache_size;
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common->keymax = sc->sc_ah->caps.keycache_size;
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if (common->keymax > ATH_KEYMAX) {
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if (common->keymax > ATH_KEYMAX) {
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ath_print(common, ATH_DBG_ANY,
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ath_print(common, ATH_DBG_ANY,
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"Warning, using only %u entries in %u key cache\n",
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"Warning, using only %u entries in %u key cache\n",
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@@ -406,73 +352,9 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
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* reset the contents on initial power up.
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* reset the contents on initial power up.
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*/
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*/
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for (i = 0; i < common->keymax; i++)
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for (i = 0; i < common->keymax; i++)
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ath9k_hw_keyreset(ah, (u16) i);
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ath9k_hw_keyreset(sc->sc_ah, (u16) i);
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/* default to MONITOR mode */
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if (ath9k_hw_getcapability(sc->sc_ah, ATH9K_CAP_CIPHER,
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sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
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/*
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* Allocate hardware transmit queues: one queue for
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* beacon frames and one data queue for each QoS
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* priority. Note that the hal handles reseting
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* these queues at the needed time.
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*/
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sc->beacon.beaconq = ath9k_hw_beaconq_setup(ah);
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if (sc->beacon.beaconq == -1) {
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ath_print(common, ATH_DBG_FATAL,
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"Unable to setup a beacon xmit queue\n");
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r = -EIO;
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goto bad2;
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}
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sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
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if (sc->beacon.cabq == NULL) {
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ath_print(common, ATH_DBG_FATAL,
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"Unable to setup CAB xmit queue\n");
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r = -EIO;
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goto bad2;
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}
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sc->config.cabqReadytime = ATH_CABQ_READY_TIME;
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ath_cabq_update(sc);
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for (i = 0; i < ARRAY_SIZE(sc->tx.hwq_map); i++)
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sc->tx.hwq_map[i] = -1;
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/* Setup data queues */
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/* NB: ensure BK queue is the lowest priority h/w queue */
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if (!ath_tx_setup(sc, ATH9K_WME_AC_BK)) {
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ath_print(common, ATH_DBG_FATAL,
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"Unable to setup xmit queue for BK traffic\n");
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r = -EIO;
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goto bad2;
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}
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if (!ath_tx_setup(sc, ATH9K_WME_AC_BE)) {
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ath_print(common, ATH_DBG_FATAL,
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"Unable to setup xmit queue for BE traffic\n");
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r = -EIO;
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goto bad2;
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}
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if (!ath_tx_setup(sc, ATH9K_WME_AC_VI)) {
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ath_print(common, ATH_DBG_FATAL,
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"Unable to setup xmit queue for VI traffic\n");
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r = -EIO;
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goto bad2;
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}
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if (!ath_tx_setup(sc, ATH9K_WME_AC_VO)) {
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ath_print(common, ATH_DBG_FATAL,
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"Unable to setup xmit queue for VO traffic\n");
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r = -EIO;
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goto bad2;
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}
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/* Initializes the noise floor to a reasonable default value.
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* Later on this will be updated during ANI processing. */
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common->ani.noise_floor = ATH_DEFAULT_NOISE_FLOOR;
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setup_timer(&common->ani.timer, ath_ani_calibrate, (unsigned long)sc);
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if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
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ATH9K_CIPHER_TKIP, NULL)) {
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ATH9K_CIPHER_TKIP, NULL)) {
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/*
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/*
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* Whether we should enable h/w TKIP MIC.
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* Whether we should enable h/w TKIP MIC.
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@@ -480,8 +362,7 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
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* report WMM capable, so it's always safe to turn on
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* report WMM capable, so it's always safe to turn on
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* TKIP MIC in this case.
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* TKIP MIC in this case.
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*/
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*/
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ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_TKIP_MIC,
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ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_TKIP_MIC, 0, 1, NULL);
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0, 1, NULL);
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}
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}
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/*
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/*
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@@ -490,46 +371,107 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
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* With split mic keys the number of stations is limited
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* With split mic keys the number of stations is limited
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* to 27 otherwise 59.
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* to 27 otherwise 59.
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*/
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*/
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if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
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if (ath9k_hw_getcapability(sc->sc_ah, ATH9K_CAP_CIPHER,
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ATH9K_CIPHER_TKIP, NULL)
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ATH9K_CIPHER_TKIP, NULL)
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&& ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
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&& ath9k_hw_getcapability(sc->sc_ah, ATH9K_CAP_CIPHER,
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ATH9K_CIPHER_MIC, NULL)
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ATH9K_CIPHER_MIC, NULL)
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&& ath9k_hw_getcapability(ah, ATH9K_CAP_TKIP_SPLIT,
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&& ath9k_hw_getcapability(sc->sc_ah, ATH9K_CAP_TKIP_SPLIT,
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0, NULL))
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0, NULL))
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common->splitmic = 1;
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common->splitmic = 1;
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/* turn on mcast key search if possible */
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/* turn on mcast key search if possible */
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if (!ath9k_hw_getcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
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if (!ath9k_hw_getcapability(sc->sc_ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
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(void)ath9k_hw_setcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 1,
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(void)ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_MCAST_KEYSRCH,
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1, NULL);
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1, 1, NULL);
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sc->config.txpowlimit = ATH_TXPOWER_MAX;
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}
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/* 11n Capabilities */
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static int ath9k_init_btcoex(struct ath_softc *sc)
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if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
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{
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sc->sc_flags |= SC_OP_TXAGGR;
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int r, qnum;
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sc->sc_flags |= SC_OP_RXAGGR;
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switch (sc->sc_ah->btcoex_hw.scheme) {
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case ATH_BTCOEX_CFG_NONE:
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break;
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case ATH_BTCOEX_CFG_2WIRE:
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ath9k_hw_btcoex_init_2wire(sc->sc_ah);
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break;
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case ATH_BTCOEX_CFG_3WIRE:
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ath9k_hw_btcoex_init_3wire(sc->sc_ah);
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r = ath_init_btcoex_timer(sc);
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if (r)
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return -1;
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qnum = ath_tx_get_qnum(sc, ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
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ath9k_hw_init_btcoex_hw(sc->sc_ah, qnum);
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sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
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break;
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default:
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WARN_ON(1);
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break;
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}
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}
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common->tx_chainmask = ah->caps.tx_chainmask;
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return 0;
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common->rx_chainmask = ah->caps.rx_chainmask;
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}
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|
||||||
ath9k_hw_setcapability(ah, ATH9K_CAP_DIVERSITY, 1, true, NULL);
|
static int ath9k_init_queues(struct ath_softc *sc)
|
||||||
sc->rx.defant = ath9k_hw_getdefantenna(ah);
|
{
|
||||||
|
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||||
|
int i = 0;
|
||||||
|
|
||||||
if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
|
for (i = 0; i < ARRAY_SIZE(sc->tx.hwq_map); i++)
|
||||||
memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
|
sc->tx.hwq_map[i] = -1;
|
||||||
|
|
||||||
sc->beacon.slottime = ATH9K_SLOT_TIME_9; /* default to short slot time */
|
sc->beacon.beaconq = ath9k_hw_beaconq_setup(sc->sc_ah);
|
||||||
|
if (sc->beacon.beaconq == -1) {
|
||||||
/* initialize beacon slots */
|
ath_print(common, ATH_DBG_FATAL,
|
||||||
for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
|
"Unable to setup a beacon xmit queue\n");
|
||||||
sc->beacon.bslot[i] = NULL;
|
goto err;
|
||||||
sc->beacon.bslot_aphy[i] = NULL;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* setup channels and rates */
|
sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
|
||||||
|
if (sc->beacon.cabq == NULL) {
|
||||||
|
ath_print(common, ATH_DBG_FATAL,
|
||||||
|
"Unable to setup CAB xmit queue\n");
|
||||||
|
goto err;
|
||||||
|
}
|
||||||
|
|
||||||
|
sc->config.cabqReadytime = ATH_CABQ_READY_TIME;
|
||||||
|
ath_cabq_update(sc);
|
||||||
|
|
||||||
|
if (!ath_tx_setup(sc, ATH9K_WME_AC_BK)) {
|
||||||
|
ath_print(common, ATH_DBG_FATAL,
|
||||||
|
"Unable to setup xmit queue for BK traffic\n");
|
||||||
|
goto err;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!ath_tx_setup(sc, ATH9K_WME_AC_BE)) {
|
||||||
|
ath_print(common, ATH_DBG_FATAL,
|
||||||
|
"Unable to setup xmit queue for BE traffic\n");
|
||||||
|
goto err;
|
||||||
|
}
|
||||||
|
if (!ath_tx_setup(sc, ATH9K_WME_AC_VI)) {
|
||||||
|
ath_print(common, ATH_DBG_FATAL,
|
||||||
|
"Unable to setup xmit queue for VI traffic\n");
|
||||||
|
goto err;
|
||||||
|
}
|
||||||
|
if (!ath_tx_setup(sc, ATH9K_WME_AC_VO)) {
|
||||||
|
ath_print(common, ATH_DBG_FATAL,
|
||||||
|
"Unable to setup xmit queue for VO traffic\n");
|
||||||
|
goto err;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
err:
|
||||||
|
for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
|
||||||
|
if (ATH_TXQ_SETUP(sc, i))
|
||||||
|
ath_tx_cleanupq(sc, &sc->tx.txq[i]);
|
||||||
|
|
||||||
|
return -EIO;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void ath9k_init_channels_rates(struct ath_softc *sc)
|
||||||
|
{
|
||||||
if (test_bit(ATH9K_MODE_11G, sc->sc_ah->caps.wireless_modes)) {
|
if (test_bit(ATH9K_MODE_11G, sc->sc_ah->caps.wireless_modes)) {
|
||||||
sc->sbands[IEEE80211_BAND_2GHZ].channels = ath9k_2ghz_chantable;
|
sc->sbands[IEEE80211_BAND_2GHZ].channels = ath9k_2ghz_chantable;
|
||||||
sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
|
sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
|
||||||
@@ -550,41 +492,133 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
|
|||||||
sc->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
|
sc->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
|
||||||
ARRAY_SIZE(ath9k_legacy_rates) - 4;
|
ARRAY_SIZE(ath9k_legacy_rates) - 4;
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
switch (ah->btcoex_hw.scheme) {
|
static void ath9k_init_misc(struct ath_softc *sc)
|
||||||
case ATH_BTCOEX_CFG_NONE:
|
{
|
||||||
break;
|
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||||
case ATH_BTCOEX_CFG_2WIRE:
|
int i = 0;
|
||||||
ath9k_hw_btcoex_init_2wire(ah);
|
|
||||||
break;
|
common->ani.noise_floor = ATH_DEFAULT_NOISE_FLOOR;
|
||||||
case ATH_BTCOEX_CFG_3WIRE:
|
setup_timer(&common->ani.timer, ath_ani_calibrate, (unsigned long)sc);
|
||||||
ath9k_hw_btcoex_init_3wire(ah);
|
|
||||||
r = ath_init_btcoex_timer(sc);
|
sc->config.txpowlimit = ATH_TXPOWER_MAX;
|
||||||
if (r)
|
|
||||||
goto bad2;
|
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
|
||||||
qnum = ath_tx_get_qnum(sc, ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
|
sc->sc_flags |= SC_OP_TXAGGR;
|
||||||
ath9k_hw_init_btcoex_hw(ah, qnum);
|
sc->sc_flags |= SC_OP_RXAGGR;
|
||||||
sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
WARN_ON(1);
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
common->tx_chainmask = sc->sc_ah->caps.tx_chainmask;
|
||||||
|
common->rx_chainmask = sc->sc_ah->caps.rx_chainmask;
|
||||||
|
|
||||||
|
ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_DIVERSITY, 1, true, NULL);
|
||||||
|
sc->rx.defant = ath9k_hw_getdefantenna(sc->sc_ah);
|
||||||
|
|
||||||
|
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
|
||||||
|
memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
|
||||||
|
|
||||||
|
sc->beacon.slottime = ATH9K_SLOT_TIME_9;
|
||||||
|
|
||||||
|
for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
|
||||||
|
sc->beacon.bslot[i] = NULL;
|
||||||
|
sc->beacon.bslot_aphy[i] = NULL;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static int ath9k_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
|
||||||
|
const struct ath_bus_ops *bus_ops)
|
||||||
|
{
|
||||||
|
struct ath_hw *ah = NULL;
|
||||||
|
struct ath_common *common;
|
||||||
|
int ret = 0, i;
|
||||||
|
int csz = 0;
|
||||||
|
|
||||||
|
sc->sc_flags |= SC_OP_INVALID;
|
||||||
|
|
||||||
|
ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
|
||||||
|
if (!ah)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
ah->hw_version.devid = devid;
|
||||||
|
ah->hw_version.subsysid = subsysid;
|
||||||
|
sc->sc_ah = ah;
|
||||||
|
|
||||||
|
common = ath9k_hw_common(ah);
|
||||||
|
common->ops = &ath9k_common_ops;
|
||||||
|
common->bus_ops = bus_ops;
|
||||||
|
common->ah = ah;
|
||||||
|
common->hw = sc->hw;
|
||||||
|
common->priv = sc;
|
||||||
|
common->debug_mask = ath9k_debug;
|
||||||
|
|
||||||
|
spin_lock_init(&sc->wiphy_lock);
|
||||||
|
spin_lock_init(&sc->sc_resetlock);
|
||||||
|
spin_lock_init(&sc->sc_serial_rw);
|
||||||
|
spin_lock_init(&sc->sc_pm_lock);
|
||||||
|
mutex_init(&sc->mutex);
|
||||||
|
tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
|
||||||
|
tasklet_init(&sc->bcon_tasklet, ath_beacon_tasklet,
|
||||||
|
(unsigned long)sc);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Cache line size is used to size and align various
|
||||||
|
* structures used to communicate with the hardware.
|
||||||
|
*/
|
||||||
|
ath_read_cachesize(common, &csz);
|
||||||
|
common->cachelsz = csz << 2; /* convert to bytes */
|
||||||
|
|
||||||
|
ret = ath9k_hw_init(ah);
|
||||||
|
if (ret) {
|
||||||
|
ath_print(common, ATH_DBG_FATAL,
|
||||||
|
"Unable to initialize hardware; "
|
||||||
|
"initialization status: %d\n", ret);
|
||||||
|
goto err_hw;
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = ath9k_init_debug(ah);
|
||||||
|
if (ret) {
|
||||||
|
ath_print(common, ATH_DBG_FATAL,
|
||||||
|
"Unable to create debugfs files\n");
|
||||||
|
goto err_debug;
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = ath9k_init_queues(sc);
|
||||||
|
if (ret)
|
||||||
|
goto err_queues;
|
||||||
|
|
||||||
|
ret = ath9k_init_btcoex(sc);
|
||||||
|
if (ret)
|
||||||
|
goto err_btcoex;
|
||||||
|
|
||||||
|
ath9k_init_crypto(sc);
|
||||||
|
ath9k_init_channels_rates(sc);
|
||||||
|
ath9k_init_misc(sc);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
bad2:
|
|
||||||
/* cleanup tx queues */
|
err_btcoex:
|
||||||
for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
|
for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
|
||||||
if (ATH_TXQ_SETUP(sc, i))
|
if (ATH_TXQ_SETUP(sc, i))
|
||||||
ath_tx_cleanupq(sc, &sc->tx.txq[i]);
|
ath_tx_cleanupq(sc, &sc->tx.txq[i]);
|
||||||
|
err_queues:
|
||||||
|
ath9k_exit_debug(ah);
|
||||||
|
err_debug:
|
||||||
|
ath9k_hw_deinit(ah);
|
||||||
|
err_hw:
|
||||||
|
tasklet_kill(&sc->intr_tq);
|
||||||
|
tasklet_kill(&sc->bcon_tasklet);
|
||||||
|
|
||||||
bad_free_hw:
|
kfree(ah);
|
||||||
ath9k_uninit_hw(sc);
|
sc->sc_ah = NULL;
|
||||||
return r;
|
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
|
void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
|
||||||
{
|
{
|
||||||
|
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||||
|
|
||||||
hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
|
hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
|
||||||
IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
|
IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
|
||||||
IEEE80211_HW_SIGNAL_DBM |
|
IEEE80211_HW_SIGNAL_DBM |
|
||||||
@@ -621,85 +655,85 @@ void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
|
|||||||
if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
|
if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
|
||||||
hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
|
hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
|
||||||
&sc->sbands[IEEE80211_BAND_5GHZ];
|
&sc->sbands[IEEE80211_BAND_5GHZ];
|
||||||
|
|
||||||
|
if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
|
||||||
|
if (test_bit(ATH9K_MODE_11G, sc->sc_ah->caps.wireless_modes))
|
||||||
|
setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
|
||||||
|
if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
|
||||||
|
setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
|
||||||
|
}
|
||||||
|
|
||||||
|
SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Device driver core initialization */
|
int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
|
||||||
int ath_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
|
|
||||||
const struct ath_bus_ops *bus_ops)
|
const struct ath_bus_ops *bus_ops)
|
||||||
{
|
{
|
||||||
struct ieee80211_hw *hw = sc->hw;
|
struct ieee80211_hw *hw = sc->hw;
|
||||||
struct ath_common *common;
|
struct ath_common *common;
|
||||||
struct ath_hw *ah;
|
struct ath_hw *ah;
|
||||||
int error = 0, i;
|
int error = 0;
|
||||||
struct ath_regulatory *reg;
|
struct ath_regulatory *reg;
|
||||||
|
|
||||||
dev_dbg(sc->dev, "Attach ATH hw\n");
|
/* Bring up device */
|
||||||
|
error = ath9k_init_softc(devid, sc, subsysid, bus_ops);
|
||||||
error = ath_init_softc(devid, sc, subsysid, bus_ops);
|
|
||||||
if (error != 0)
|
if (error != 0)
|
||||||
return error;
|
goto error_init;
|
||||||
|
|
||||||
ah = sc->sc_ah;
|
ah = sc->sc_ah;
|
||||||
common = ath9k_hw_common(ah);
|
common = ath9k_hw_common(ah);
|
||||||
|
ath9k_set_hw_capab(sc, hw);
|
||||||
|
|
||||||
/* get mac address from hardware and set in mac80211 */
|
/* Initialize regulatory */
|
||||||
|
|
||||||
SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
|
|
||||||
|
|
||||||
ath_set_hw_capab(sc, hw);
|
|
||||||
|
|
||||||
error = ath_regd_init(&common->regulatory, sc->hw->wiphy,
|
error = ath_regd_init(&common->regulatory, sc->hw->wiphy,
|
||||||
ath9k_reg_notifier);
|
ath9k_reg_notifier);
|
||||||
if (error)
|
if (error)
|
||||||
return error;
|
goto error_regd;
|
||||||
|
|
||||||
reg = &common->regulatory;
|
reg = &common->regulatory;
|
||||||
|
|
||||||
if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
|
/* Setup TX DMA */
|
||||||
if (test_bit(ATH9K_MODE_11G, ah->caps.wireless_modes))
|
|
||||||
setup_ht_cap(sc,
|
|
||||||
&sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
|
|
||||||
if (test_bit(ATH9K_MODE_11A, ah->caps.wireless_modes))
|
|
||||||
setup_ht_cap(sc,
|
|
||||||
&sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* initialize tx/rx engine */
|
|
||||||
error = ath_tx_init(sc, ATH_TXBUF);
|
error = ath_tx_init(sc, ATH_TXBUF);
|
||||||
if (error != 0)
|
if (error != 0)
|
||||||
goto error_attach;
|
goto error_tx;
|
||||||
|
|
||||||
|
/* Setup RX DMA */
|
||||||
error = ath_rx_init(sc, ATH_RXBUF);
|
error = ath_rx_init(sc, ATH_RXBUF);
|
||||||
if (error != 0)
|
if (error != 0)
|
||||||
goto error_attach;
|
goto error_rx;
|
||||||
|
|
||||||
|
/* Register with mac80211 */
|
||||||
|
error = ieee80211_register_hw(hw);
|
||||||
|
if (error)
|
||||||
|
goto error_register;
|
||||||
|
|
||||||
|
/* Handle world regulatory */
|
||||||
|
if (!ath_is_world_regd(reg)) {
|
||||||
|
error = regulatory_hint(hw->wiphy, reg->alpha2);
|
||||||
|
if (error)
|
||||||
|
goto error_world;
|
||||||
|
}
|
||||||
|
|
||||||
INIT_WORK(&sc->chan_work, ath9k_wiphy_chan_work);
|
INIT_WORK(&sc->chan_work, ath9k_wiphy_chan_work);
|
||||||
INIT_DELAYED_WORK(&sc->wiphy_work, ath9k_wiphy_work);
|
INIT_DELAYED_WORK(&sc->wiphy_work, ath9k_wiphy_work);
|
||||||
sc->wiphy_scheduler_int = msecs_to_jiffies(500);
|
sc->wiphy_scheduler_int = msecs_to_jiffies(500);
|
||||||
|
|
||||||
error = ieee80211_register_hw(hw);
|
|
||||||
|
|
||||||
if (!ath_is_world_regd(reg)) {
|
|
||||||
error = regulatory_hint(hw->wiphy, reg->alpha2);
|
|
||||||
if (error)
|
|
||||||
goto error_attach;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Initialize LED control */
|
|
||||||
ath_init_leds(sc);
|
ath_init_leds(sc);
|
||||||
|
|
||||||
ath_start_rfkill_poll(sc);
|
ath_start_rfkill_poll(sc);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
error_attach:
|
error_world:
|
||||||
/* cleanup tx queues */
|
ieee80211_unregister_hw(hw);
|
||||||
for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
|
error_register:
|
||||||
if (ATH_TXQ_SETUP(sc, i))
|
ath_rx_cleanup(sc);
|
||||||
ath_tx_cleanupq(sc, &sc->tx.txq[i]);
|
error_rx:
|
||||||
|
ath_tx_cleanup(sc);
|
||||||
ath9k_uninit_hw(sc);
|
error_tx:
|
||||||
|
/* Nothing */
|
||||||
|
error_regd:
|
||||||
|
ath9k_deinit_softc(sc);
|
||||||
|
error_init:
|
||||||
return error;
|
return error;
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -707,29 +741,34 @@ error_attach:
|
|||||||
/* De-Initialization */
|
/* De-Initialization */
|
||||||
/*****************************/
|
/*****************************/
|
||||||
|
|
||||||
static void ath9k_uninit_hw(struct ath_softc *sc)
|
static void ath9k_deinit_softc(struct ath_softc *sc)
|
||||||
{
|
{
|
||||||
struct ath_hw *ah = sc->sc_ah;
|
int i = 0;
|
||||||
|
|
||||||
BUG_ON(!ah);
|
if ((sc->btcoex.no_stomp_timer) &&
|
||||||
|
sc->sc_ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
|
||||||
|
ath_gen_timer_free(sc->sc_ah, sc->btcoex.no_stomp_timer);
|
||||||
|
|
||||||
ath9k_exit_debug(ah);
|
for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
|
||||||
ath9k_hw_detach(ah);
|
if (ATH_TXQ_SETUP(sc, i))
|
||||||
sc->sc_ah = NULL;
|
ath_tx_cleanupq(sc, &sc->tx.txq[i]);
|
||||||
|
|
||||||
|
ath9k_exit_debug(sc->sc_ah);
|
||||||
|
ath9k_hw_deinit(sc->sc_ah);
|
||||||
|
|
||||||
|
tasklet_kill(&sc->intr_tq);
|
||||||
|
tasklet_kill(&sc->bcon_tasklet);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ath_clean_core(struct ath_softc *sc)
|
void ath9k_deinit_device(struct ath_softc *sc)
|
||||||
{
|
{
|
||||||
struct ieee80211_hw *hw = sc->hw;
|
struct ieee80211_hw *hw = sc->hw;
|
||||||
struct ath_hw *ah = sc->sc_ah;
|
|
||||||
int i = 0;
|
int i = 0;
|
||||||
|
|
||||||
ath9k_ps_wakeup(sc);
|
ath9k_ps_wakeup(sc);
|
||||||
|
|
||||||
dev_dbg(sc->dev, "Detach ATH hw\n");
|
|
||||||
|
|
||||||
ath_deinit_leds(sc);
|
|
||||||
wiphy_rfkill_stop_polling(sc->hw->wiphy);
|
wiphy_rfkill_stop_polling(sc->hw->wiphy);
|
||||||
|
ath_deinit_leds(sc);
|
||||||
|
|
||||||
for (i = 0; i < sc->num_sec_wiphy; i++) {
|
for (i = 0; i < sc->num_sec_wiphy; i++) {
|
||||||
struct ath_wiphy *aphy = sc->sec_wiphy[i];
|
struct ath_wiphy *aphy = sc->sec_wiphy[i];
|
||||||
@@ -739,24 +778,12 @@ static void ath_clean_core(struct ath_softc *sc)
|
|||||||
ieee80211_unregister_hw(aphy->hw);
|
ieee80211_unregister_hw(aphy->hw);
|
||||||
ieee80211_free_hw(aphy->hw);
|
ieee80211_free_hw(aphy->hw);
|
||||||
}
|
}
|
||||||
|
kfree(sc->sec_wiphy);
|
||||||
|
|
||||||
ieee80211_unregister_hw(hw);
|
ieee80211_unregister_hw(hw);
|
||||||
ath_rx_cleanup(sc);
|
ath_rx_cleanup(sc);
|
||||||
ath_tx_cleanup(sc);
|
ath_tx_cleanup(sc);
|
||||||
|
ath9k_deinit_softc(sc);
|
||||||
tasklet_kill(&sc->intr_tq);
|
|
||||||
tasklet_kill(&sc->bcon_tasklet);
|
|
||||||
|
|
||||||
if (!(sc->sc_flags & SC_OP_INVALID))
|
|
||||||
ath9k_setpower(sc, ATH9K_PM_AWAKE);
|
|
||||||
|
|
||||||
/* cleanup tx queues */
|
|
||||||
for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
|
|
||||||
if (ATH_TXQ_SETUP(sc, i))
|
|
||||||
ath_tx_cleanupq(sc, &sc->tx.txq[i]);
|
|
||||||
|
|
||||||
if ((sc->btcoex.no_stomp_timer) &&
|
|
||||||
ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
|
|
||||||
ath_gen_timer_free(ah, sc->btcoex.no_stomp_timer);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void ath_descdma_cleanup(struct ath_softc *sc,
|
void ath_descdma_cleanup(struct ath_softc *sc,
|
||||||
@@ -771,26 +798,6 @@ void ath_descdma_cleanup(struct ath_softc *sc,
|
|||||||
memset(dd, 0, sizeof(*dd));
|
memset(dd, 0, sizeof(*dd));
|
||||||
}
|
}
|
||||||
|
|
||||||
void ath_detach(struct ath_softc *sc)
|
|
||||||
{
|
|
||||||
ath_clean_core(sc);
|
|
||||||
ath9k_uninit_hw(sc);
|
|
||||||
}
|
|
||||||
|
|
||||||
void ath_cleanup(struct ath_softc *sc)
|
|
||||||
{
|
|
||||||
struct ath_hw *ah = sc->sc_ah;
|
|
||||||
struct ath_common *common = ath9k_hw_common(ah);
|
|
||||||
|
|
||||||
ath_clean_core(sc);
|
|
||||||
free_irq(sc->irq, sc);
|
|
||||||
ath_bus_cleanup(common);
|
|
||||||
kfree(sc->sec_wiphy);
|
|
||||||
ieee80211_free_hw(sc->hw);
|
|
||||||
|
|
||||||
ath9k_uninit_hw(sc);
|
|
||||||
}
|
|
||||||
|
|
||||||
/************************/
|
/************************/
|
||||||
/* Module Hooks */
|
/* Module Hooks */
|
||||||
/************************/
|
/************************/
|
||||||
|
@@ -113,25 +113,22 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||||||
u16 subsysid;
|
u16 subsysid;
|
||||||
u32 val;
|
u32 val;
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
struct ath_hw *ah;
|
|
||||||
char hw_name[64];
|
char hw_name[64];
|
||||||
|
|
||||||
if (pci_enable_device(pdev))
|
if (pci_enable_device(pdev))
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
|
||||||
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
||||||
|
|
||||||
if (ret) {
|
if (ret) {
|
||||||
printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
|
printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
|
||||||
goto bad;
|
goto err_dma;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
|
ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
|
||||||
|
|
||||||
if (ret) {
|
if (ret) {
|
||||||
printk(KERN_ERR "ath9k: 32-bit DMA consistent "
|
printk(KERN_ERR "ath9k: 32-bit DMA consistent "
|
||||||
"DMA enable failed\n");
|
"DMA enable failed\n");
|
||||||
goto bad;
|
goto err_dma;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
@@ -171,22 +168,22 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(&pdev->dev, "PCI memory region reserve error\n");
|
dev_err(&pdev->dev, "PCI memory region reserve error\n");
|
||||||
ret = -ENODEV;
|
ret = -ENODEV;
|
||||||
goto bad;
|
goto err_region;
|
||||||
}
|
}
|
||||||
|
|
||||||
mem = pci_iomap(pdev, 0, 0);
|
mem = pci_iomap(pdev, 0, 0);
|
||||||
if (!mem) {
|
if (!mem) {
|
||||||
printk(KERN_ERR "PCI memory map error\n") ;
|
printk(KERN_ERR "PCI memory map error\n") ;
|
||||||
ret = -EIO;
|
ret = -EIO;
|
||||||
goto bad1;
|
goto err_iomap;
|
||||||
}
|
}
|
||||||
|
|
||||||
hw = ieee80211_alloc_hw(sizeof(struct ath_wiphy) +
|
hw = ieee80211_alloc_hw(sizeof(struct ath_wiphy) +
|
||||||
sizeof(struct ath_softc), &ath9k_ops);
|
sizeof(struct ath_softc), &ath9k_ops);
|
||||||
if (!hw) {
|
if (!hw) {
|
||||||
dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
|
dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
|
||||||
ret = -ENOMEM;
|
ret = -ENOMEM;
|
||||||
goto bad2;
|
goto err_alloc_hw;
|
||||||
}
|
}
|
||||||
|
|
||||||
SET_IEEE80211_DEV(hw, &pdev->dev);
|
SET_IEEE80211_DEV(hw, &pdev->dev);
|
||||||
@@ -201,25 +198,22 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||||||
sc->dev = &pdev->dev;
|
sc->dev = &pdev->dev;
|
||||||
sc->mem = mem;
|
sc->mem = mem;
|
||||||
|
|
||||||
pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsysid);
|
|
||||||
ret = ath_init_device(id->device, sc, subsysid, &ath_pci_bus_ops);
|
|
||||||
if (ret) {
|
|
||||||
dev_err(&pdev->dev, "failed to initialize device\n");
|
|
||||||
goto bad3;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* setup interrupt service routine */
|
|
||||||
|
|
||||||
ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc);
|
ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(&pdev->dev, "request_irq failed\n");
|
dev_err(&pdev->dev, "request_irq failed\n");
|
||||||
goto bad4;
|
goto err_irq;
|
||||||
}
|
}
|
||||||
|
|
||||||
sc->irq = pdev->irq;
|
sc->irq = pdev->irq;
|
||||||
|
|
||||||
ah = sc->sc_ah;
|
pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsysid);
|
||||||
ath9k_hw_name(ah, hw_name, sizeof(hw_name));
|
ret = ath9k_init_device(id->device, sc, subsysid, &ath_pci_bus_ops);
|
||||||
|
if (ret) {
|
||||||
|
dev_err(&pdev->dev, "Failed to initialize device\n");
|
||||||
|
goto err_init;
|
||||||
|
}
|
||||||
|
|
||||||
|
ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
|
||||||
printk(KERN_INFO
|
printk(KERN_INFO
|
||||||
"%s: %s mem=0x%lx, irq=%d\n",
|
"%s: %s mem=0x%lx, irq=%d\n",
|
||||||
wiphy_name(hw->wiphy),
|
wiphy_name(hw->wiphy),
|
||||||
@@ -227,15 +221,18 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
|||||||
(unsigned long)mem, pdev->irq);
|
(unsigned long)mem, pdev->irq);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
bad4:
|
|
||||||
ath_detach(sc);
|
err_init:
|
||||||
bad3:
|
free_irq(sc->irq, sc);
|
||||||
|
err_irq:
|
||||||
ieee80211_free_hw(hw);
|
ieee80211_free_hw(hw);
|
||||||
bad2:
|
err_alloc_hw:
|
||||||
pci_iounmap(pdev, mem);
|
pci_iounmap(pdev, mem);
|
||||||
bad1:
|
err_iomap:
|
||||||
pci_release_region(pdev, 0);
|
pci_release_region(pdev, 0);
|
||||||
bad:
|
err_region:
|
||||||
|
/* Nothing */
|
||||||
|
err_dma:
|
||||||
pci_disable_device(pdev);
|
pci_disable_device(pdev);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
@@ -245,8 +242,12 @@ static void ath_pci_remove(struct pci_dev *pdev)
|
|||||||
struct ieee80211_hw *hw = pci_get_drvdata(pdev);
|
struct ieee80211_hw *hw = pci_get_drvdata(pdev);
|
||||||
struct ath_wiphy *aphy = hw->priv;
|
struct ath_wiphy *aphy = hw->priv;
|
||||||
struct ath_softc *sc = aphy->sc;
|
struct ath_softc *sc = aphy->sc;
|
||||||
|
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
|
||||||
|
|
||||||
ath_cleanup(sc);
|
ath9k_deinit_device(sc);
|
||||||
|
free_irq(sc->irq, sc);
|
||||||
|
ieee80211_free_hw(sc->hw);
|
||||||
|
ath_bus_cleanup(common);
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_PM
|
#ifdef CONFIG_PM
|
||||||
|
@@ -152,7 +152,7 @@ int ath9k_wiphy_add(struct ath_softc *sc)
|
|||||||
|
|
||||||
SET_IEEE80211_PERM_ADDR(hw, addr);
|
SET_IEEE80211_PERM_ADDR(hw, addr);
|
||||||
|
|
||||||
ath_set_hw_capab(sc, hw);
|
ath9k_set_hw_capab(sc, hw);
|
||||||
|
|
||||||
error = ieee80211_register_hw(hw);
|
error = ieee80211_register_hw(hw);
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user