[MTD] NAND: add subpage write support
Many SLC NANDs support up to 4 writes at one NAND page. Add support of this feature. Signed-off-by: Artem Bityutskiy <dedekind@infradead.org>
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Artem Bityutskiy
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f6a7ecb18d
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29072b9607
@ -166,6 +166,9 @@ typedef enum {
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* for all large page devices, as they do not support
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* autoincrement.*/
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#define NAND_NO_READRDY 0x00000100
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/* Chip does not allow subpage writes */
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#define NAND_NO_SUBPAGE_WRITE 0x00000200
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/* Options valid for Samsung large page devices */
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#define NAND_SAMSUNG_LP_OPTIONS \
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@ -193,6 +196,9 @@ typedef enum {
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/* Nand scan has allocated controller struct */
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#define NAND_CONTROLLER_ALLOC 0x80000000
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/* Cell info constants */
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#define NAND_CI_CHIPNR_MSK 0x03
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#define NAND_CI_CELLTYPE_MSK 0x0C
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/*
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* nand_state_t - chip states
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@ -341,6 +347,7 @@ struct nand_buffers {
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* @chipsize: [INTERN] the size of one chip for multichip arrays
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* @pagemask: [INTERN] page number mask = number of (pages / chip) - 1
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* @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf
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* @subpagesize: [INTERN] holds the subpagesize
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* @ecclayout: [REPLACEABLE] the default ecc placement scheme
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* @bbt: [INTERN] bad block table pointer
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* @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup
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@ -388,6 +395,8 @@ struct nand_chip {
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unsigned long chipsize;
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int pagemask;
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int pagebuf;
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int subpagesize;
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uint8_t cellinfo;
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int badblockpos;
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nand_state_t state;
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