Merge master.kernel.org:/home/rmk/linux-2.6-serial
This commit is contained in:
@@ -561,7 +561,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
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#
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#
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CONFIG_SERIAL_S3C2410=y
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CONFIG_SERIAL_S3C2410=y
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CONFIG_SERIAL_S3C2410_CONSOLE=y
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CONFIG_SERIAL_S3C2410_CONSOLE=y
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CONFIG_SERIAL_BAST_SIO=y
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CONFIG_SERIAL_CORE=y
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CONFIG_SERIAL_CORE=y
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CONFIG_SERIAL_CORE_CONSOLE=y
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CONFIG_SERIAL_CORE_CONSOLE=y
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CONFIG_UNIX98_PTYS=y
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CONFIG_UNIX98_PTYS=y
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@@ -570,7 +570,6 @@ CONFIG_SERIAL_8250_SHARE_IRQ=y
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#
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#
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CONFIG_SERIAL_S3C2410=y
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CONFIG_SERIAL_S3C2410=y
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CONFIG_SERIAL_S3C2410_CONSOLE=y
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CONFIG_SERIAL_S3C2410_CONSOLE=y
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CONFIG_SERIAL_BAST_SIO=y
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CONFIG_SERIAL_CORE=y
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CONFIG_SERIAL_CORE=y
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CONFIG_SERIAL_CORE_CONSOLE=y
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CONFIG_SERIAL_CORE_CONSOLE=y
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CONFIG_UNIX98_PTYS=y
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CONFIG_UNIX98_PTYS=y
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@@ -28,6 +28,7 @@
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* 14-Mar-2006 BJD Updated for __iomem changes
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* 14-Mar-2006 BJD Updated for __iomem changes
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* 22-Jun-2006 BJD Added DM9000 platform information
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* 22-Jun-2006 BJD Added DM9000 platform information
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* 28-Jun-2006 BJD Moved pm functionality out to common code
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* 28-Jun-2006 BJD Moved pm functionality out to common code
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* 17-Jul-2006 BJD Changed to platform device for SuperIO 16550s
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*/
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*/
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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@@ -64,6 +65,8 @@
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#include <linux/mtd/nand_ecc.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/partitions.h>
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#include <linux/serial_8250.h>
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#include "clock.h"
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#include "clock.h"
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#include "devs.h"
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#include "devs.h"
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#include "cpu.h"
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#include "cpu.h"
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@@ -351,6 +354,39 @@ static struct platform_device bast_device_dm9k = {
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}
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}
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};
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};
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/* serial devices */
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#define SERIAL_BASE (S3C2410_CS2 + BAST_PA_SUPERIO)
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#define SERIAL_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SHARE_IRQ)
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#define SERIAL_CLK (1843200)
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static struct plat_serial8250_port bast_sio_data[] = {
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[0] = {
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.mapbase = SERIAL_BASE + 0x2f8,
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.irq = IRQ_PCSERIAL1,
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.flags = SERIAL_FLAGS,
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.iotype = UPIO_MEM,
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.regshift = 0,
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.uartclk = SERIAL_CLK,
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},
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[1] = {
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.mapbase = SERIAL_BASE + 0x3f8,
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.irq = IRQ_PCSERIAL2,
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.flags = SERIAL_FLAGS,
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.iotype = UPIO_MEM,
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.regshift = 0,
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.uartclk = SERIAL_CLK,
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},
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{ }
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};
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static struct platform_device bast_sio = {
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.name = "serial8250",
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.id = 0,
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.dev = {
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.platform_data = &bast_sio_data,
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},
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};
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/* Standard BAST devices */
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/* Standard BAST devices */
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@@ -364,6 +400,7 @@ static struct platform_device *bast_devices[] __initdata = {
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&s3c_device_nand,
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&s3c_device_nand,
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&bast_device_nor,
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&bast_device_nor,
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&bast_device_dm9k,
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&bast_device_dm9k,
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&bast_sio,
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};
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};
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static struct clk *bast_clocks[] = {
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static struct clk *bast_clocks[] = {
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@@ -389,6 +389,9 @@ static void __devexit sbs_exit(struct pci_dev *dev)
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* - 10x cards have control registers in IO and/or memory space;
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* - 10x cards have control registers in IO and/or memory space;
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* - 20x cards have control registers in standard PCI configuration space.
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* - 20x cards have control registers in standard PCI configuration space.
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*
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*
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* There are also Quartet Serial cards which use Oxford Semiconductor
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* 16954 quad UART PCI chip clocked by 18.432 MHz quartz.
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*
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* Note: some SIIG cards are probed by the parport_serial object.
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* Note: some SIIG cards are probed by the parport_serial object.
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*/
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*/
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@@ -1026,6 +1029,8 @@ enum pci_board_num_t {
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pbn_b0_2_921600,
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pbn_b0_2_921600,
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pbn_b0_4_921600,
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pbn_b0_4_921600,
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pbn_b0_4_1152000,
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pbn_b0_bt_1_115200,
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pbn_b0_bt_1_115200,
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pbn_b0_bt_2_115200,
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pbn_b0_bt_2_115200,
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pbn_b0_bt_8_115200,
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pbn_b0_bt_8_115200,
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@@ -1158,6 +1163,12 @@ static struct pci_board pci_boards[] __devinitdata = {
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.base_baud = 921600,
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.base_baud = 921600,
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.uart_offset = 8,
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.uart_offset = 8,
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},
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},
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[pbn_b0_4_1152000] = {
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.flags = FL_BASE0,
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.num_ports = 4,
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.base_baud = 1152000,
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.uart_offset = 8,
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},
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[pbn_b0_bt_1_115200] = {
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[pbn_b0_bt_1_115200] = {
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.flags = FL_BASE0|FL_BASE_BARS,
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.flags = FL_BASE0|FL_BASE_BARS,
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@@ -1755,33 +1766,30 @@ pciserial_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
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static void __devexit pciserial_remove_one(struct pci_dev *dev)
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static void __devexit pciserial_remove_one(struct pci_dev *dev)
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{
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{
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struct serial_private *priv = pci_get_drvdata(dev);
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struct serial_private *priv = pci_get_drvdata(dev);
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struct pci_serial_quirk *quirk;
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int i;
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pci_set_drvdata(dev, NULL);
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pci_set_drvdata(dev, NULL);
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if (priv) {
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for (i = 0; i < priv->nr; i++)
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struct pci_serial_quirk *quirk;
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serial8250_unregister_port(priv->line[i]);
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int i;
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for (i = 0; i < priv->nr; i++)
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for (i = 0; i < PCI_NUM_BAR_RESOURCES; i++) {
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serial8250_unregister_port(priv->line[i]);
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if (priv->remapped_bar[i])
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iounmap(priv->remapped_bar[i]);
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for (i = 0; i < PCI_NUM_BAR_RESOURCES; i++) {
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priv->remapped_bar[i] = NULL;
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if (priv->remapped_bar[i])
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iounmap(priv->remapped_bar[i]);
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priv->remapped_bar[i] = NULL;
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}
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/*
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* Find the exit quirks.
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*/
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quirk = find_quirk(dev);
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if (quirk->exit)
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quirk->exit(dev);
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pci_disable_device(dev);
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kfree(priv);
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}
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}
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/*
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* Find the exit quirks.
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*/
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quirk = find_quirk(dev);
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if (quirk->exit)
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quirk->exit(dev);
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pci_disable_device(dev);
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kfree(priv);
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}
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}
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static int pciserial_suspend_one(struct pci_dev *dev, pm_message_t state)
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static int pciserial_suspend_one(struct pci_dev *dev, pm_message_t state)
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@@ -1977,6 +1985,9 @@ static struct pci_device_id serial_pci_tbl[] = {
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{ PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_OXSEMI_16PCI954,
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{ PCI_VENDOR_ID_SPECIALIX, PCI_DEVICE_ID_OXSEMI_16PCI954,
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PCI_VENDOR_ID_SPECIALIX, PCI_SUBDEVICE_ID_SPECIALIX_SPEED4, 0, 0,
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PCI_VENDOR_ID_SPECIALIX, PCI_SUBDEVICE_ID_SPECIALIX_SPEED4, 0, 0,
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pbn_b0_4_921600 },
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pbn_b0_4_921600 },
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{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
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PCI_SUBVENDOR_ID_SIIG, PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL, 0, 0,
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pbn_b0_4_1152000 },
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{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
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{ PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI954,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0,
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pbn_b0_4_115200 },
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pbn_b0_4_115200 },
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@@ -306,13 +306,6 @@ config SERIAL_S3C2410_CONSOLE
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your boot loader about how to pass options to the kernel at
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your boot loader about how to pass options to the kernel at
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boot time.)
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boot time.)
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config SERIAL_BAST_SIO
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bool "Support for BAST SuperIO serial ports"
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depends on ARCH_BAST && SERIAL_8250=y
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help
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Support for registerin the SuperIO chip on BAST board with
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the 8250/16550 uart code.
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config SERIAL_DZ
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config SERIAL_DZ
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bool "DECstation DZ serial driver"
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bool "DECstation DZ serial driver"
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depends on MACH_DECSTATION && MIPS32
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depends on MACH_DECSTATION && MIPS32
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@@ -44,7 +44,6 @@ obj-$(CONFIG_SERIAL_LH7A40X) += serial_lh7a40x.o
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obj-$(CONFIG_SERIAL_AU1X00) += au1x00_uart.o
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obj-$(CONFIG_SERIAL_AU1X00) += au1x00_uart.o
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obj-$(CONFIG_SERIAL_DZ) += dz.o
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obj-$(CONFIG_SERIAL_DZ) += dz.o
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obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o
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obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o
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obj-$(CONFIG_SERIAL_BAST_SIO) += bast_sio.o
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obj-$(CONFIG_SERIAL_SGI_L1_CONSOLE) += sn_console.o
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obj-$(CONFIG_SERIAL_SGI_L1_CONSOLE) += sn_console.o
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obj-$(CONFIG_SERIAL_CPM) += cpm_uart/
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obj-$(CONFIG_SERIAL_CPM) += cpm_uart/
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obj-$(CONFIG_SERIAL_IMX) += imx.o
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obj-$(CONFIG_SERIAL_IMX) += imx.o
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@@ -1,80 +0,0 @@
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/* linux/drivers/serial/bast_sio.c
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*
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* Copyright (c) 2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* http://www.simtec.co.uk/products/EB2410ITX/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Modifications:
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* 23-Sep-2004 BJD Added copyright header
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* 23-Sep-2004 BJD Added serial port remove code
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*/
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#include <linux/module.h>
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/tty.h>
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#include <linux/serial.h>
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#include <linux/serial_core.h>
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#include <linux/types.h>
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#include <asm/io.h>
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#include <asm/serial.h>
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#include <asm/mach-types.h>
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#include <asm/arch/map.h>
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#include <asm/arch/irqs.h>
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#include <asm/arch/bast-map.h>
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#include <asm/arch/bast-irq.h>
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static int __init serial_bast_register(unsigned long port, unsigned int irq)
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{
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struct serial_struct serial_req;
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serial_req.flags = UPF_AUTOPROBE | UPF_SHARE_IRQ;
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serial_req.baud_base = BASE_BAUD;
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serial_req.irq = irq;
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serial_req.io_type = UPIO_MEM;
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serial_req.iomap_base = port;
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serial_req.iomem_base = ioremap(port, 0x10);
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serial_req.iomem_reg_shift = 0;
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return register_serial(&serial_req);
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}
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#define SERIAL_BASE (S3C2410_CS2 + BAST_PA_SUPERIO)
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static int port[2] = { -1, -1 };
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static int __init serial_bast_init(void)
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{
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if (machine_is_bast()) {
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port[0] = serial_bast_register(SERIAL_BASE + 0x2f8, IRQ_PCSERIAL1);
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port[1] = serial_bast_register(SERIAL_BASE + 0x3f8, IRQ_PCSERIAL2);
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}
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return 0;
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}
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static void __exit serial_bast_exit(void)
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{
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if (port[0] != -1)
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unregister_serial(port[0]);
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if (port[1] != -1)
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unregister_serial(port[1]);
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}
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module_init(serial_bast_init);
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module_exit(serial_bast_exit);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Ben Dooks, ben@simtec.co.uk");
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MODULE_DESCRIPTION("BAST Onboard Serial setup");
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@@ -1872,6 +1872,7 @@
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#define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
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#define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
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#define PCI_VENDOR_ID_SIIG 0x131f
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#define PCI_VENDOR_ID_SIIG 0x131f
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#define PCI_SUBVENDOR_ID_SIIG 0x131f
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#define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000
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#define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000
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#define PCI_DEVICE_ID_SIIG_1S_10x_650 0x1001
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#define PCI_DEVICE_ID_SIIG_1S_10x_650 0x1001
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#define PCI_DEVICE_ID_SIIG_1S_10x_850 0x1002
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#define PCI_DEVICE_ID_SIIG_1S_10x_850 0x1002
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@@ -1909,6 +1910,7 @@
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#define PCI_DEVICE_ID_SIIG_2S1P_20x_550 0x2060
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#define PCI_DEVICE_ID_SIIG_2S1P_20x_550 0x2060
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#define PCI_DEVICE_ID_SIIG_2S1P_20x_650 0x2061
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#define PCI_DEVICE_ID_SIIG_2S1P_20x_650 0x2061
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#define PCI_DEVICE_ID_SIIG_2S1P_20x_850 0x2062
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#define PCI_DEVICE_ID_SIIG_2S1P_20x_850 0x2062
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#define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050
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#define PCI_VENDOR_ID_RADISYS 0x1331
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#define PCI_VENDOR_ID_RADISYS 0x1331
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#define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030
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#define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030
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