ARM: add size argument to __cpuc_flush_dcache_page
... and rename the function since it no longer operates on just pages. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@@ -186,15 +186,16 @@ ENTRY(mohawk_coherent_user_range)
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mov pc, lr
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/*
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* flush_kern_dcache_page(void *page)
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* flush_kern_dcache_area(void *addr, size_t size)
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*
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* Ensure no D cache aliasing occurs, either with itself or
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* the I cache
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*
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* - addr - page aligned address
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* - addr - kernel address
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* - size - region size
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*/
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ENTRY(mohawk_flush_kern_dcache_page)
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add r1, r0, #PAGE_SZ
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ENTRY(mohawk_flush_kern_dcache_area)
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add r1, r0, r1
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1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry
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add r0, r0, #CACHE_DLINESIZE
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cmp r0, r1
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@@ -273,7 +274,7 @@ ENTRY(mohawk_cache_fns)
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.long mohawk_flush_user_cache_range
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.long mohawk_coherent_kern_range
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.long mohawk_coherent_user_range
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.long mohawk_flush_kern_dcache_page
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.long mohawk_flush_kern_dcache_area
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.long mohawk_dma_inv_range
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.long mohawk_dma_clean_range
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.long mohawk_dma_flush_range
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