Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (257 commits)
[ARM] Update mach-types
ARM: 5636/1: Move vendor enum to AMBA include
ARM: Fix pfn_valid() for sparse memory
[ARM] orion5x: Add LaCie NAS 2Big Network support
[ARM] pxa/sharpsl_pm: zaurus c3000 aka spitz: fix resume
ARM: 5686/1: at91: Correct AC97 reset line in at91sam9263ek board
ARM: 5640/1: This patch modifies the support of AC97 on the at91sam9263 ek board
ARM: 5689/1: Update default config of HP Jornada 700-series machines
ARM: 5691/1: fix cache aliasing issues between kmap() and kmap_atomic() with highmem
ARM: 5688/1: ks8695_serial: disable_irq() lockup
ARM: 5687/1: fix an oops with highmem
ARM: 5684/1: Add nuc960 platform to w90x900
ARM: 5683/1: Add nuc950 platform to w90x900
ARM: 5682/1: Add cpu.c and dev.c and modify some files of w90p910 platform
ARM: 5626/1: add suspend/resume functions to amba-pl011 serial driver
ARM: 5625/1: fix hard coded 4K resource size in amba bus detection
MMC: MMCI: convert realview MMC to use gpiolib
ARM: 5685/1: Make MMCI driver compile without gpiolib
ARM: implement highpte
ARM: Show FIQ in /proc/interrupts on CONFIG_FIQ
...
Fix up trivial conflict in arch/arm/kernel/signal.c.
It was due to the TIF_NOTIFY_RESUME addition in commit d0420c83f
("KEYS:
Extend TIF_NOTIFY_RESUME to (almost) all architectures") and follow-ups.
This commit is contained in:
@@ -74,23 +74,56 @@
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* Enable and disable interrupts
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*/
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#if __LINUX_ARM_ARCH__ >= 6
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.macro disable_irq
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.macro disable_irq_notrace
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cpsid i
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.endm
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.macro enable_irq
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.macro enable_irq_notrace
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cpsie i
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.endm
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#else
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.macro disable_irq
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.macro disable_irq_notrace
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msr cpsr_c, #PSR_I_BIT | SVC_MODE
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.endm
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.macro enable_irq
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.macro enable_irq_notrace
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msr cpsr_c, #SVC_MODE
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.endm
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#endif
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.macro asm_trace_hardirqs_off
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#if defined(CONFIG_TRACE_IRQFLAGS)
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stmdb sp!, {r0-r3, ip, lr}
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bl trace_hardirqs_off
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ldmia sp!, {r0-r3, ip, lr}
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#endif
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.endm
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.macro asm_trace_hardirqs_on_cond, cond
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#if defined(CONFIG_TRACE_IRQFLAGS)
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/*
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* actually the registers should be pushed and pop'd conditionally, but
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* after bl the flags are certainly clobbered
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*/
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stmdb sp!, {r0-r3, ip, lr}
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bl\cond trace_hardirqs_on
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ldmia sp!, {r0-r3, ip, lr}
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#endif
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.endm
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.macro asm_trace_hardirqs_on
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asm_trace_hardirqs_on_cond al
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.endm
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.macro disable_irq
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disable_irq_notrace
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asm_trace_hardirqs_off
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.endm
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.macro enable_irq
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asm_trace_hardirqs_on
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enable_irq_notrace
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.endm
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/*
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* Save the current IRQ state and disable IRQs. Note that this macro
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* assumes FIQs are enabled, and that the processor is in SVC mode.
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@@ -104,10 +137,16 @@
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* Restore interrupt state previously stored in a register. We don't
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* guarantee that this will preserve the flags.
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*/
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.macro restore_irqs, oldcpsr
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.macro restore_irqs_notrace, oldcpsr
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msr cpsr_c, \oldcpsr
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.endm
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.macro restore_irqs, oldcpsr
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tst \oldcpsr, #PSR_I_BIT
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asm_trace_hardirqs_on_cond eq
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restore_irqs_notrace \oldcpsr
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.endm
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#define USER(x...) \
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9999: x; \
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.section __ex_table,"a"; \
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@@ -127,3 +166,87 @@
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#endif
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#endif
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.endm
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#ifdef CONFIG_THUMB2_KERNEL
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.macro setmode, mode, reg
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mov \reg, #\mode
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msr cpsr_c, \reg
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.endm
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#else
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.macro setmode, mode, reg
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msr cpsr_c, #\mode
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.endm
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#endif
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/*
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* STRT/LDRT access macros with ARM and Thumb-2 variants
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*/
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#ifdef CONFIG_THUMB2_KERNEL
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.macro usraccoff, instr, reg, ptr, inc, off, cond, abort
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9999:
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.if \inc == 1
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\instr\cond\()bt \reg, [\ptr, #\off]
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.elseif \inc == 4
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\instr\cond\()t \reg, [\ptr, #\off]
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.else
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.error "Unsupported inc macro argument"
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.endif
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.section __ex_table,"a"
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.align 3
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.long 9999b, \abort
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.previous
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.endm
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.macro usracc, instr, reg, ptr, inc, cond, rept, abort
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@ explicit IT instruction needed because of the label
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@ introduced by the USER macro
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.ifnc \cond,al
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.if \rept == 1
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itt \cond
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.elseif \rept == 2
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ittt \cond
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.else
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.error "Unsupported rept macro argument"
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.endif
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.endif
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@ Slightly optimised to avoid incrementing the pointer twice
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usraccoff \instr, \reg, \ptr, \inc, 0, \cond, \abort
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.if \rept == 2
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usraccoff \instr, \reg, \ptr, \inc, 4, \cond, \abort
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.endif
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add\cond \ptr, #\rept * \inc
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.endm
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#else /* !CONFIG_THUMB2_KERNEL */
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.macro usracc, instr, reg, ptr, inc, cond, rept, abort
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.rept \rept
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9999:
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.if \inc == 1
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\instr\cond\()bt \reg, [\ptr], #\inc
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.elseif \inc == 4
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\instr\cond\()t \reg, [\ptr], #\inc
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.else
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.error "Unsupported inc macro argument"
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.endif
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.section __ex_table,"a"
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.align 3
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.long 9999b, \abort
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.previous
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.endr
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.endm
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#endif /* CONFIG_THUMB2_KERNEL */
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.macro strusr, reg, ptr, inc, cond=al, rept=1, abort=9001f
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usracc str, \reg, \ptr, \inc, \cond, \rept, \abort
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.endm
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.macro ldrusr, reg, ptr, inc, cond=al, rept=1, abort=9001f
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usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort
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.endm
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@@ -55,6 +55,9 @@ typedef struct user_fp elf_fpregset_t;
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#define R_ARM_MOVW_ABS_NC 43
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#define R_ARM_MOVT_ABS 44
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#define R_ARM_THM_CALL 10
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#define R_ARM_THM_JUMP24 30
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/*
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* These are used to set parameters in the core dumps.
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*/
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@@ -7,8 +7,43 @@
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#ifndef __ASSEMBLY__
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extern void mcount(void);
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extern void __gnu_mcount_nc(void);
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#endif
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#endif
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#ifndef __ASSEMBLY__
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#if defined(CONFIG_FRAME_POINTER) && !defined(CONFIG_ARM_UNWIND)
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/*
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* return_address uses walk_stackframe to do it's work. If both
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* CONFIG_FRAME_POINTER=y and CONFIG_ARM_UNWIND=y walk_stackframe uses unwind
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* information. For this to work in the function tracer many functions would
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* have to be marked with __notrace. So for now just depend on
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* !CONFIG_ARM_UNWIND.
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*/
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void *return_address(unsigned int);
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#else
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extern inline void *return_address(unsigned int level)
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{
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return NULL;
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}
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#endif
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#define HAVE_ARCH_CALLER_ADDR
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#define CALLER_ADDR0 ((unsigned long)__builtin_return_address(0))
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#define CALLER_ADDR1 ((unsigned long)return_address(1))
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#define CALLER_ADDR2 ((unsigned long)return_address(2))
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#define CALLER_ADDR3 ((unsigned long)return_address(3))
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#define CALLER_ADDR4 ((unsigned long)return_address(4))
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#define CALLER_ADDR5 ((unsigned long)return_address(5))
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#define CALLER_ADDR6 ((unsigned long)return_address(6))
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#endif /* ifndef __ASSEMBLY__ */
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#endif /* _ASM_ARM_FTRACE */
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@@ -99,6 +99,7 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
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__asm__ __volatile__("@futex_atomic_cmpxchg_inatomic\n"
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"1: ldrt %0, [%3]\n"
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" teq %0, %1\n"
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" it eq @ explicit IT needed for the 2b label\n"
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"2: streqt %2, [%3]\n"
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"3:\n"
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" .section __ex_table,\"a\"\n"
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@@ -10,6 +10,8 @@ struct mmc_platform_data {
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unsigned int ocr_mask; /* available voltages */
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u32 (*translate_vdd)(struct device *, unsigned int);
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unsigned int (*status)(struct device *);
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int gpio_wp;
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int gpio_cd;
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};
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#endif
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@@ -44,7 +44,13 @@
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* The module space lives between the addresses given by TASK_SIZE
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* and PAGE_OFFSET - it must be within 32MB of the kernel text.
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*/
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#ifndef CONFIG_THUMB2_KERNEL
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#define MODULES_VADDR (PAGE_OFFSET - 16*1024*1024)
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#else
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/* smaller range for Thumb-2 symbols relocation (2^24)*/
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#define MODULES_VADDR (PAGE_OFFSET - 8*1024*1024)
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#endif
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#if TASK_SIZE > MODULES_VADDR
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#error Top of user space clashes with start of module space
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#endif
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@@ -212,7 +218,6 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
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*
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* page_to_pfn(page) convert a struct page * to a PFN number
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* pfn_to_page(pfn) convert a _valid_ PFN number to struct page *
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* pfn_valid(pfn) indicates whether a PFN number is valid
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*
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* virt_to_page(k) convert a _valid_ virtual address to struct page *
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* virt_addr_valid(k) indicates whether a virtual address is valid
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@@ -221,10 +226,6 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
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#define ARCH_PFN_OFFSET PHYS_PFN_OFFSET
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#ifndef CONFIG_SPARSEMEM
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#define pfn_valid(pfn) ((pfn) >= PHYS_PFN_OFFSET && (pfn) < (PHYS_PFN_OFFSET + max_mapnr))
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#endif
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#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
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#define virt_addr_valid(kaddr) ((unsigned long)(kaddr) >= PAGE_OFFSET && (unsigned long)(kaddr) < (unsigned long)high_memory)
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@@ -241,18 +242,6 @@ static inline __deprecated void *bus_to_virt(unsigned long x)
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#define arch_pfn_to_nid(pfn) PFN_TO_NID(pfn)
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#define arch_local_page_offset(pfn, nid) LOCAL_MAP_NR((pfn) << PAGE_SHIFT)
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#define pfn_valid(pfn) \
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({ \
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unsigned int nid = PFN_TO_NID(pfn); \
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int valid = nid < MAX_NUMNODES; \
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if (valid) { \
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pg_data_t *node = NODE_DATA(nid); \
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valid = (pfn - node->node_start_pfn) < \
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node->node_spanned_pages; \
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} \
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valid; \
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})
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#define virt_to_page(kaddr) \
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(ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr))
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@@ -62,8 +62,10 @@ static inline void check_context(struct mm_struct *mm)
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static inline void check_context(struct mm_struct *mm)
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{
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#ifdef CONFIG_MMU
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if (unlikely(mm->context.kvm_seq != init_mm.context.kvm_seq))
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__check_kvm_seq(mm);
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#endif
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}
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#define init_new_context(tsk,mm) 0
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|
@@ -43,7 +43,4 @@ typedef unsigned long pgprot_t;
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#define __pmd(x) (x)
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#define __pgprot(x) (x)
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extern unsigned long memory_start;
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extern unsigned long memory_end;
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#endif
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|
@@ -194,6 +194,10 @@ typedef unsigned long pgprot_t;
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typedef struct page *pgtable_t;
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#ifndef CONFIG_SPARSEMEM
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extern int pfn_valid(unsigned long);
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#endif
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#include <asm/memory.h>
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#endif /* !__ASSEMBLY__ */
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|
@@ -36,6 +36,8 @@ extern void free_pgd_slow(struct mm_struct *mm, pgd_t *pgd);
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#define pgd_alloc(mm) get_pgd_slow(mm)
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#define pgd_free(mm, pgd) free_pgd_slow(mm, pgd)
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#define PGALLOC_GFP (GFP_KERNEL | __GFP_NOTRACK | __GFP_REPEAT | __GFP_ZERO)
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/*
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* Allocate one PTE table.
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*
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@@ -57,7 +59,7 @@ pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr)
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{
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pte_t *pte;
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pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
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pte = (pte_t *)__get_free_page(PGALLOC_GFP);
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if (pte) {
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clean_dcache_area(pte, sizeof(pte_t) * PTRS_PER_PTE);
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pte += PTRS_PER_PTE;
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@@ -71,10 +73,16 @@ pte_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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struct page *pte;
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pte = alloc_pages(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO, 0);
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#ifdef CONFIG_HIGHPTE
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pte = alloc_pages(PGALLOC_GFP | __GFP_HIGHMEM, 0);
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#else
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pte = alloc_pages(PGALLOC_GFP, 0);
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#endif
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if (pte) {
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void *page = page_address(pte);
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clean_dcache_area(page, sizeof(pte_t) * PTRS_PER_PTE);
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if (!PageHighMem(pte)) {
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void *page = page_address(pte);
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clean_dcache_area(page, sizeof(pte_t) * PTRS_PER_PTE);
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}
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pgtable_page_ctor(pte);
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}
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|
@@ -162,10 +162,8 @@ extern void __pgd_error(const char *file, int line, unsigned long val);
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* entries are stored 1024 bytes below.
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*/
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#define L_PTE_PRESENT (1 << 0)
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#define L_PTE_FILE (1 << 1) /* only when !PRESENT */
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#define L_PTE_YOUNG (1 << 1)
|
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#define L_PTE_BUFFERABLE (1 << 2) /* obsolete, matches PTE */
|
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#define L_PTE_CACHEABLE (1 << 3) /* obsolete, matches PTE */
|
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#define L_PTE_FILE (1 << 2) /* only when !PRESENT */
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#define L_PTE_DIRTY (1 << 6)
|
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#define L_PTE_WRITE (1 << 7)
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#define L_PTE_USER (1 << 8)
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@@ -264,10 +262,19 @@ extern struct page *empty_zero_page;
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#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
|
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#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
|
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#define pte_offset_kernel(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr))
|
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#define pte_offset_map(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr))
|
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#define pte_offset_map_nested(dir,addr) (pmd_page_vaddr(*(dir)) + __pte_index(addr))
|
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#define pte_unmap(pte) do { } while (0)
|
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#define pte_unmap_nested(pte) do { } while (0)
|
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|
||||
#define pte_offset_map(dir,addr) (__pte_map(dir, KM_PTE0) + __pte_index(addr))
|
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#define pte_offset_map_nested(dir,addr) (__pte_map(dir, KM_PTE1) + __pte_index(addr))
|
||||
#define pte_unmap(pte) __pte_unmap(pte, KM_PTE0)
|
||||
#define pte_unmap_nested(pte) __pte_unmap(pte, KM_PTE1)
|
||||
|
||||
#ifndef CONFIG_HIGHPTE
|
||||
#define __pte_map(dir,km) pmd_page_vaddr(*(dir))
|
||||
#define __pte_unmap(pte,km) do { } while (0)
|
||||
#else
|
||||
#define __pte_map(dir,km) ((pte_t *)kmap_atomic(pmd_page(*(dir)), km) + PTRS_PER_PTE)
|
||||
#define __pte_unmap(pte,km) kunmap_atomic((pte - PTRS_PER_PTE), km)
|
||||
#endif
|
||||
|
||||
#define set_pte_ext(ptep,pte,ext) cpu_set_pte_ext(ptep,pte,ext)
|
||||
|
||||
@@ -381,13 +388,13 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
|
||||
*
|
||||
* 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
|
||||
* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
|
||||
* <--------------- offset --------------------> <--- type --> 0 0
|
||||
* <--------------- offset --------------------> <- type --> 0 0 0
|
||||
*
|
||||
* This gives us up to 127 swap files and 32GB per swap file. Note that
|
||||
* This gives us up to 63 swap files and 32GB per swap file. Note that
|
||||
* the offset field is always non-zero.
|
||||
*/
|
||||
#define __SWP_TYPE_SHIFT 2
|
||||
#define __SWP_TYPE_BITS 7
|
||||
#define __SWP_TYPE_SHIFT 3
|
||||
#define __SWP_TYPE_BITS 6
|
||||
#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
|
||||
#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
|
||||
|
||||
@@ -411,13 +418,13 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
|
||||
*
|
||||
* 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
|
||||
* 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
|
||||
* <------------------------ offset -------------------------> 1 0
|
||||
* <----------------------- offset ------------------------> 1 0 0
|
||||
*/
|
||||
#define pte_file(pte) (pte_val(pte) & L_PTE_FILE)
|
||||
#define pte_to_pgoff(x) (pte_val(x) >> 2)
|
||||
#define pgoff_to_pte(x) __pte(((x) << 2) | L_PTE_FILE)
|
||||
#define pte_to_pgoff(x) (pte_val(x) >> 3)
|
||||
#define pgoff_to_pte(x) __pte(((x) << 3) | L_PTE_FILE)
|
||||
|
||||
#define PTE_FILE_MAX_BITS 30
|
||||
#define PTE_FILE_MAX_BITS 29
|
||||
|
||||
/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
|
||||
/* FIXME: this is not correct */
|
||||
|
@@ -82,6 +82,14 @@
|
||||
#define PSR_ENDSTATE 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* These are 'magic' values for PTRACE_PEEKUSR that return info about where a
|
||||
* process is located in memory.
|
||||
*/
|
||||
#define PT_TEXT_ADDR 0x10000
|
||||
#define PT_DATA_ADDR 0x10004
|
||||
#define PT_TEXT_END_ADDR 0x10008
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
|
@@ -142,6 +142,7 @@ extern void vfp_sync_state(struct thread_info *thread);
|
||||
#define TIF_USING_IWMMXT 17
|
||||
#define TIF_MEMDIE 18
|
||||
#define TIF_FREEZE 19
|
||||
#define TIF_RESTORE_SIGMASK 20
|
||||
|
||||
#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
|
||||
#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
|
||||
@@ -150,6 +151,7 @@ extern void vfp_sync_state(struct thread_info *thread);
|
||||
#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
|
||||
#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT)
|
||||
#define _TIF_FREEZE (1 << TIF_FREEZE)
|
||||
#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
|
||||
|
||||
/*
|
||||
* Change these and you break ASM code in entry-common.S
|
||||
|
@@ -17,6 +17,7 @@
|
||||
#include <asm/memory.h>
|
||||
#include <asm/domain.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/unified.h>
|
||||
|
||||
#define VERIFY_READ 0
|
||||
#define VERIFY_WRITE 1
|
||||
@@ -365,8 +366,10 @@ do { \
|
||||
|
||||
#define __put_user_asm_dword(x,__pu_addr,err) \
|
||||
__asm__ __volatile__( \
|
||||
"1: strt " __reg_oper1 ", [%1], #4\n" \
|
||||
"2: strt " __reg_oper0 ", [%1]\n" \
|
||||
ARM( "1: strt " __reg_oper1 ", [%1], #4\n" ) \
|
||||
ARM( "2: strt " __reg_oper0 ", [%1]\n" ) \
|
||||
THUMB( "1: strt " __reg_oper1 ", [%1]\n" ) \
|
||||
THUMB( "2: strt " __reg_oper0 ", [%1, #4]\n" ) \
|
||||
"3:\n" \
|
||||
" .section .fixup,\"ax\"\n" \
|
||||
" .align 2\n" \
|
||||
|
126
arch/arm/include/asm/unified.h
Normal file
126
arch/arm/include/asm/unified.h
Normal file
@@ -0,0 +1,126 @@
|
||||
/*
|
||||
* include/asm-arm/unified.h - Unified Assembler Syntax helper macros
|
||||
*
|
||||
* Copyright (C) 2008 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __ASM_UNIFIED_H
|
||||
#define __ASM_UNIFIED_H
|
||||
|
||||
#if defined(__ASSEMBLY__) && defined(CONFIG_ARM_ASM_UNIFIED)
|
||||
.syntax unified
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_THUMB2_KERNEL
|
||||
|
||||
#if __GNUC__ < 4
|
||||
#error Thumb-2 kernel requires gcc >= 4
|
||||
#endif
|
||||
|
||||
/* The CPSR bit describing the instruction set (Thumb) */
|
||||
#define PSR_ISETSTATE PSR_T_BIT
|
||||
|
||||
#define ARM(x...)
|
||||
#define THUMB(x...) x
|
||||
#define W(instr) instr.w
|
||||
#define BSYM(sym) sym + 1
|
||||
|
||||
#else /* !CONFIG_THUMB2_KERNEL */
|
||||
|
||||
/* The CPSR bit describing the instruction set (ARM) */
|
||||
#define PSR_ISETSTATE 0
|
||||
|
||||
#define ARM(x...) x
|
||||
#define THUMB(x...)
|
||||
#define W(instr) instr
|
||||
#define BSYM(sym) sym
|
||||
|
||||
#endif /* CONFIG_THUMB2_KERNEL */
|
||||
|
||||
#ifndef CONFIG_ARM_ASM_UNIFIED
|
||||
|
||||
/*
|
||||
* If the unified assembly syntax isn't used (in ARM mode), these
|
||||
* macros expand to an empty string
|
||||
*/
|
||||
#ifdef __ASSEMBLY__
|
||||
.macro it, cond
|
||||
.endm
|
||||
.macro itt, cond
|
||||
.endm
|
||||
.macro ite, cond
|
||||
.endm
|
||||
.macro ittt, cond
|
||||
.endm
|
||||
.macro itte, cond
|
||||
.endm
|
||||
.macro itet, cond
|
||||
.endm
|
||||
.macro itee, cond
|
||||
.endm
|
||||
.macro itttt, cond
|
||||
.endm
|
||||
.macro ittte, cond
|
||||
.endm
|
||||
.macro ittet, cond
|
||||
.endm
|
||||
.macro ittee, cond
|
||||
.endm
|
||||
.macro itett, cond
|
||||
.endm
|
||||
.macro itete, cond
|
||||
.endm
|
||||
.macro iteet, cond
|
||||
.endm
|
||||
.macro iteee, cond
|
||||
.endm
|
||||
#else /* !__ASSEMBLY__ */
|
||||
__asm__(
|
||||
" .macro it, cond\n"
|
||||
" .endm\n"
|
||||
" .macro itt, cond\n"
|
||||
" .endm\n"
|
||||
" .macro ite, cond\n"
|
||||
" .endm\n"
|
||||
" .macro ittt, cond\n"
|
||||
" .endm\n"
|
||||
" .macro itte, cond\n"
|
||||
" .endm\n"
|
||||
" .macro itet, cond\n"
|
||||
" .endm\n"
|
||||
" .macro itee, cond\n"
|
||||
" .endm\n"
|
||||
" .macro itttt, cond\n"
|
||||
" .endm\n"
|
||||
" .macro ittte, cond\n"
|
||||
" .endm\n"
|
||||
" .macro ittet, cond\n"
|
||||
" .endm\n"
|
||||
" .macro ittee, cond\n"
|
||||
" .endm\n"
|
||||
" .macro itett, cond\n"
|
||||
" .endm\n"
|
||||
" .macro itete, cond\n"
|
||||
" .endm\n"
|
||||
" .macro iteet, cond\n"
|
||||
" .endm\n"
|
||||
" .macro iteee, cond\n"
|
||||
" .endm\n");
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* CONFIG_ARM_ASM_UNIFIED */
|
||||
|
||||
#endif /* !__ASM_UNIFIED_H */
|
@@ -360,8 +360,8 @@
|
||||
#define __NR_readlinkat (__NR_SYSCALL_BASE+332)
|
||||
#define __NR_fchmodat (__NR_SYSCALL_BASE+333)
|
||||
#define __NR_faccessat (__NR_SYSCALL_BASE+334)
|
||||
/* 335 for pselect6 */
|
||||
/* 336 for ppoll */
|
||||
#define __NR_pselect6 (__NR_SYSCALL_BASE+335)
|
||||
#define __NR_ppoll (__NR_SYSCALL_BASE+336)
|
||||
#define __NR_unshare (__NR_SYSCALL_BASE+337)
|
||||
#define __NR_set_robust_list (__NR_SYSCALL_BASE+338)
|
||||
#define __NR_get_robust_list (__NR_SYSCALL_BASE+339)
|
||||
@@ -372,7 +372,7 @@
|
||||
#define __NR_vmsplice (__NR_SYSCALL_BASE+343)
|
||||
#define __NR_move_pages (__NR_SYSCALL_BASE+344)
|
||||
#define __NR_getcpu (__NR_SYSCALL_BASE+345)
|
||||
/* 346 for epoll_pwait */
|
||||
#define __NR_epoll_pwait (__NR_SYSCALL_BASE+346)
|
||||
#define __NR_kexec_load (__NR_SYSCALL_BASE+347)
|
||||
#define __NR_utimensat (__NR_SYSCALL_BASE+348)
|
||||
#define __NR_signalfd (__NR_SYSCALL_BASE+349)
|
||||
@@ -432,6 +432,7 @@
|
||||
#define __ARCH_WANT_SYS_SIGPENDING
|
||||
#define __ARCH_WANT_SYS_SIGPROCMASK
|
||||
#define __ARCH_WANT_SYS_RT_SIGACTION
|
||||
#define __ARCH_WANT_SYS_RT_SIGSUSPEND
|
||||
|
||||
#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
|
||||
#define __ARCH_WANT_SYS_TIME
|
||||
|
Reference in New Issue
Block a user