powerpc: Remaining 64-bit Book3E support
This contains all the bits that didn't fit in previous patches :-) This includes the actual exception handlers assembly, the changes to the kernel entry, other misc bits and wiring it all up in Kconfig. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@@ -93,7 +93,7 @@ extern void __restore_cpu_power7(void);
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PPC_FEATURE_BOOKE)
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static struct cpu_spec __initdata cpu_specs[] = {
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#ifdef CONFIG_PPC64
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#ifdef CONFIG_PPC_BOOK3S_64
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{ /* Power3 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00400000,
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@@ -508,7 +508,30 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.machine_check = machine_check_generic,
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.platform = "power4",
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}
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#endif /* CONFIG_PPC64 */
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#endif /* CONFIG_PPC_BOOK3S_64 */
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#ifdef CONFIG_PPC_BOOK3E_64
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{ /* This is a default entry to get going, to be replaced by
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* a real one at some stage
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*/
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#define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
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CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
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CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
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.pvr_mask = 0x00000000,
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.pvr_value = 0x00000000,
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.cpu_name = "Book3E",
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.cpu_features = CPU_FTRS_BASE_BOOK3E,
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.cpu_user_features = COMMON_USER_PPC64,
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.mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
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MMU_FTR_USE_TLBIVAX_BCAST |
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MMU_FTR_LOCK_BCAST_INVAL,
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.icache_bsize = 64,
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.dcache_bsize = 64,
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.num_pmcs = 0,
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.machine_check = machine_check_generic,
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.platform = "power6",
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},
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#endif
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#ifdef CONFIG_PPC32
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#if CLASSIC_PPC
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{ /* 601 */
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