arch/tile: Fix bug in support for atomic64_xx() ops.
This wasn't properly tested until the perf-event subsystem started to get brought up under the tile architecture. The bug caused bogus atomic64_cmpxchg() values to be returned, among other things. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
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@@ -89,11 +89,11 @@ STD_ENTRY_SECTION(__atomic\name, .text.atomic)
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lh r22, r0
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lh r22, r0
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.else
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.else
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lw r22, r0
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lw r22, r0
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addi r23, r0, 4
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addi r28, r0, 4
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.endif
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.endif
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}
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}
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.ifc \bitwidth,64
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.ifc \bitwidth,64
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lw r23, r23
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lw r23, r28
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.endif
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.endif
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\body /* set r24, and r25 if 64-bit */
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\body /* set r24, and r25 if 64-bit */
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{
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{
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@@ -109,11 +109,10 @@ STD_ENTRY_SECTION(__atomic\name, .text.atomic)
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sh r0, r24
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sh r0, r24
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.else
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.else
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sw r0, r24
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sw r0, r24
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addi r23, r0, 4
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.endif
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.endif
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}
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}
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.ifc \bitwidth,64
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.ifc \bitwidth,64
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sw r23, r25
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sw r28, r25
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.endif
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.endif
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mf
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mf
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3: {
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3: {
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