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gianfar: Fix Rx/Tx HW interrupt coalescing counter reset procedure.

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- Fix Rx/Tx HW interrupt coalescing counter reset logic. Disabling
is required before resetting the counter.

- Update the Default both Rx and Tx coalescing timer
threshold. Formerly 4 is set which is equal to 1.5 frame at the line
rate of 1GbE interface, and it doesn't match to the coalescing frame
count which is set to 16. Threashold 21 is matched to frame count 16.

Signed-off-by: Dai Haruki <dai.haruki@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Andy Fleming
2008-03-24 10:53:28 -05:00
committed by Jeff Garzik
parent 99da5003a5
commit 2f44891128
2 changed files with 11 additions and 11 deletions
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18
drivers/net/gianfar.c
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@ -1299,11 +1299,11 @@ static irqreturn_t gfar_transmit(int irq, void *dev_id)
/* If we are coalescing the interrupts, reset the timer */
/* Otherwise, clear it */
if (priv->txcoalescing)
if (likely(priv->txcoalescing)) {
gfar_write(&priv->regs->txic, 0);
gfar_write(&priv->regs->txic,
mk_ic_value(priv->txcount, priv->txtime));
else
gfar_write(&priv->regs->txic, 0);
}
spin_unlock(&priv->txlock);
@ -1417,11 +1417,11 @@ irqreturn_t gfar_receive(int irq, void *dev_id)
/* If we are coalescing interrupts, update the timer */
/* Otherwise, clear it */
if (priv->rxcoalescing)
if (likely(priv->rxcoalescing)) {
gfar_write(&priv->regs->rxic, 0);
gfar_write(&priv->regs->rxic,
mk_ic_value(priv->rxcount, priv->rxtime));
else
gfar_write(&priv->regs->rxic, 0);
}
spin_unlock_irqrestore(&priv->rxlock, flags);
#endif
@ -1593,11 +1593,11 @@ static int gfar_poll(struct napi_struct *napi, int budget)
/* If we are coalescing interrupts, update the timer */
/* Otherwise, clear it */
if (priv->rxcoalescing)
if (likely(priv->rxcoalescing)) {
gfar_write(&priv->regs->rxic, 0);
gfar_write(&priv->regs->rxic,
mk_ic_value(priv->rxcount, priv->rxtime));
else
gfar_write(&priv->regs->rxic, 0);
}
}
return howmany;