lk/linux-kernel-test
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

[MIPS] Add CoreFPGA5 support; distinguish between SOCit/ROCit

Browse Source 
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Chris Dearman
2007-09-21 14:50:08 +01:00
committed by Ralf Baechle
parent bdc94eb41e
commit 308402445e
2 changed files with 12 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
arch/mips/mips-boards/generic/init.c
View File

@@ -295,15 +295,21 @@ void __init prom_init(void)
break; break;
case MIPS_REVISION_CORID_CORE_MSC: case MIPS_REVISION_CORID_CORE_MSC:
case MIPS_REVISION_CORID_CORE_FPGA2: case MIPS_REVISION_CORID_CORE_FPGA2:
case MIPS_REVISION_CORID_CORE_FPGA3:
case MIPS_REVISION_CORID_CORE_FPGA4:
case MIPS_REVISION_CORID_CORE_24K: case MIPS_REVISION_CORID_CORE_24K:
case MIPS_REVISION_CORID_CORE_EMUL_MSC: /*
* SOCit/ROCit support is essentially identical
* but make an attempt to distinguish them
*/
mips_revision_sconid = MIPS_REVISION_SCON_SOCIT; mips_revision_sconid = MIPS_REVISION_SCON_SOCIT;
break; break;
case MIPS_REVISION_CORID_CORE_FPGA3:
case MIPS_REVISION_CORID_CORE_FPGA4:
case MIPS_REVISION_CORID_CORE_FPGA5:
case MIPS_REVISION_CORID_CORE_EMUL_MSC:
default: default:
mips_display_message("CC Error"); /* See above */
while (1); /* We die here... */ mips_revision_sconid = MIPS_REVISION_SCON_ROCIT;
break;
} }
} }

1
include/asm-mips/mips-boards/generic.h
View File

@@ -68,6 +68,7 @@
#define MIPS_REVISION_CORID_CORE_FPGA3 9 #define MIPS_REVISION_CORID_CORE_FPGA3 9
#define MIPS_REVISION_CORID_CORE_24K 10 #define MIPS_REVISION_CORID_CORE_24K 10
#define MIPS_REVISION_CORID_CORE_FPGA4 11 #define MIPS_REVISION_CORID_CORE_FPGA4 11
#define MIPS_REVISION_CORID_CORE_FPGA5 12
/**** Artificial corid defines ****/ /**** Artificial corid defines ****/
/* /*